CryoCMOS Analog IC Designer, Quantum

Global Foundries; Austin (TX); Sur place; USD 85 000 - 202 000; Plein temps

Résumé du poste

GlobalFoundries seeks an analog design engineer to develop high‑performance analog and mixed‑signal ICs and reusable IP for advanced semiconductor applications, including cryogenic CMOS and quantum systems, driving designs from architecture through tapeout and silicon validation.

The role requires a bachelor's degree in electrical engineering or a related field, at least 5 years of analog/mixed-signal IC experience, and proficiency with SPICE, layout, DRC/LVS, and post‑layout extraction, plus up

Qualifications

• Bachelor's degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
• Minimum 5 years of relevant analog or mixed-signal IC design experience.
• Demonstrated experience taking analog or mixed-signal circuits through schematic design, simulation, layout, DRC/LVS, parasitic extraction, tapeout, and silicon validation.
• Strong knowledge of CMOS analog design fundamentals, including device physics, noise, matching, feedback, stability, frequency response, process variation, and PVT/Monte Carlo analysis.
• Proficiency with industry-standard analog IC design, SPICE simulation, layout, physical verification, and post-layout extraction environments.
• Ability to independently analyze complex circuit and silicon performance issues and translate results into design improvements.

Responsabilités

• Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers.
• Own circuit development from architecture and transistor-level design through simulation, layout supervision, physical verification, tapeout, silicon characterization, and design-to-measurement correlation.
• Perform comprehensive circuit analysis across process, voltage, and temperature, including Monte Carlo/mismatch, noise, stability, linearity, timing, and post-layout parasitic simulations.
• Optimize circuit performance across operating temperature ranges, including cryogenic conditions, power constraints, process variation, device behavior, and layout-dependent effects.
• Collaborate with device modeling and PDK teams to assess model accuracy, identify model or design-rule gaps, and provide circuit-level feedback supporting cryogenic and advanced PDK development and validation.
• Drive analog layout requirements and reviews for device matching, common-centroid structures, shielding, isolation, parasitic management, signal integrity, power integrity, and design for manufacturability.
• Define silicon test structures and characterization plans, analyze measured data, debug performance issues, and correlate hardware results with pre-silicon simulation and compact models.
• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.

Connaissances

CMOS analog design

SPICE simulations

Circuit troubleshooting

Python scripting

Formation

Bachelor's degree in Electrical Engineering or related field

Outils

SPICE

Layout

DRC/LVS

Parasitic extraction

Description du poste

About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role

GlobalFoundries is seeking a Analog Design Engineer to develop advanced analog and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems. This role will drive designs from circuit architecture through tapeout and silicon validation while partnering closely with technology, PDK, modeling, layout, and test teams.

Essential Responsibilities

• Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers.
• Own circuit development from architecture and transistor-level design through simulation, layout supervision, physical verification, tapeout, silicon characterization, and design-to-measurement correlation.
• Perform comprehensive circuit analysis across process, voltage, and temperature, including Monte Carlo/mismatch, noise, stability, linearity, timing, and post-layout parasitic simulations.
• Optimize circuit performance across operating temperature ranges, including cryogenic conditions, power constraints, process variation, device behavior, and layout-dependent effects.
• Collaborate with device modeling and PDK teams to assess model accuracy, identify model or design-rule gaps, and provide circuit-level feedback supporting cryogenic and advanced PDK development and validation.
• Drive analog layout requirements and reviews for device matching, common-centroid structures, shielding, isolation, parasitic management, signal integrity, power integrity, and design for manufacturability.
• Define silicon test structures and characterization plans, analyze measured data, debug performance issues, and correlate hardware results with pre-silicon simulation and compact models.
• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.

Other Responsibilities

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

• Education - Bachelor's degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
• Experience - Minimum 5 years of relevant analog or mixed-signal integrated circuit design experience.
• Skills - Demonstrated experience taking analog or mixed-signal circuits through schematic design, simulation, layout, DRC/LVS, parasitic extraction, tapeout, and silicon validation.
• Skills - Strong knowledge of CMOS analog design fundamentals, including device physics, noise, matching, feedback, stability, frequency response, process variation, and PVT/Monte Carlo analysis.
• Skills - Proficiency with industry-standard analog IC design, SPICE simulation, layout, physical verification, and post-layout extraction environments.
• Skills - Ability to independently analyze complex circuit and silicon performance issues and translate results into design improvements.
• Travel - Up to 10%.
• Fluency in English Language - written & verbal.

Preferred Qualifications

• Education - Master's degree or PhD in Electrical Engineering, Microelectronics, or a related field.
• Experience - Experience with cryogenic CMOS, low-temperature circuit design or characterization, quantum-control electronics, precision instrumentation, RF, or other advanced analog applications.
• Skills - Familiarity with CMOS device behavior and compact-model limitations at cryogenic temperatures.
• Skills - Experience designing advanced analog/mixed-signal blocks such as ADCs/DACs, PLLs, LNAs, VGAs, oscillators, voltage/current references, LDOs, or high-speed drivers.
• Skills - Experience with silicon characterization and correlation of measured results to simulation, including interactions with device modeling, PDK, process technology, or test teams.
• Skills - Familiarity with design or characterization automation using Python, SKILL, Tcl, or equivalent scripting languages.
• Project management skills - i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills.
• Strong planning & organizational skills.

Expected Salary Range$85,000.00 - $202,000.00The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential.

GlobalFoundries goal of excellence in the workplace necessitates the attraction and retention of highly qualified people.

Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law