CryoCMOS Digital IC Design engineer, Quantum

GLOBALFOUNDRIES U.S. INC.; Austin (TX); On-site; USD 98,000 - 202,000; Full time

Job summary

GlobalFoundries is seeking a Digital IC Design Engineer to develop advanced digital and mixed-signal ICs and reusable IP for emerging applications, including cryogenic CMOS and quantum systems.

The role spans architecture, RTL, and physical implementation through tapeout and silicon validation, working with technology, PDK, modeling, verification, and test teams. 5+ years in digital IC/ASIC design preferred; travel up to 10% may be required.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering or related field.
• Minimum 5 years of relevant digital IC/ASIC design experience.
• Experience with RTL design and verification using Verilog, SystemVerilog, or VHDL.
• Experience with ASIC design flows: synthesis, STA, clock/reset, DFT, physical implementation, timing closure, and signoff.
• Strong understanding of synchronous digital design, CDC, RDC, low-power, and PVT timing behavior.
• Willingness to travel up to 10%.
• Fluency in English—written & verbal.

Responsibilities

• Design digital CMOS circuits, digital subsystems, and reusable IP for advanced semiconductor applications, including control, interface, timing, calibration, and signal-processing functions.
• Own digital IC development from microarchitecture and RTL implementation through functional verification, synthesis, timing closure, physical implementation, tapeout, and silicon validation.
• Develop verification strategies using simulation, assertions, coverage, and regression methodologies to ensure functional correctness and robust operation across intended use conditions.
• Perform and support synthesis, static timing analysis, clock/reset design, power analysis, design-for-test, and physical implementation activities, including post-layout verification and design signoff.
• Optimize digital architectures for power, performance, area, reliability, and operating-temperature requirements, including cryogenic operating conditions where applicable.
• Collaborate with PDK, device modeling, technology, analog, layout, and EDA teams to evaluate digital design methodology, libraries, timing models, design rules, and implementation flows for emerging technologies.
• Define silicon test and characterization requirements, analyze measured data, debug digital functionality and timing issues, and correlate silicon behavior with pre-silicon models and simulations.
• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.

Skills

RTL design

SystemVerilog

VHDL

Digital IC verification

Synthesis

Physical design

Clock domain crossing

Low-power design

Python scripting

Education

Bachelor’s in Electrical/Computer Engineering

Master’s or PhD in Electrical/Computer Engineering

Tools

UVM

FPGA prototyping

DFT/scan

Python scripting

Job description

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

GlobalFoundries is seeking a Digital IC Design Engineer to develop advanced digital and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems. This role will drive designs from architecture and RTL through physical implementation, tapeout, and silicon validation while partnering closely with technology, PDK, modeling, verification, and test teams.

Essential Responsibilities:

• Design and develop digital CMOS circuits, digital subsystems, and reusable IP for advanced semiconductor applications, including control, interface, timing, calibration, and signal-processing functions.
• Own digital IC development from microarchitecture and RTL implementation through functional verification, synthesis, timing closure, physical implementation, tapeout, and silicon validation.
• Develop and execute verification strategies using simulation, assertions, coverage, and regression methodologies to ensure functional correctness and robust operation across intended use conditions.
• Perform and support synthesis, static timing analysis, clock/reset design, power analysis, design-for-test, and physical implementation activities, including post-layout verification and design signoff.
• Optimize digital architectures for power, performance, area, reliability, and operating-temperature requirements, including cryogenic operating conditions where applicable.
• Collaborate with PDK, device modeling, technology, analog, layout, and EDA teams to evaluate digital design methodology, libraries, timing models, design rules, and implementation flows for emerging technologies.
• Define silicon test and characterization requirements, analyze measured data, debug digital functionality and timing issues, and correlate silicon behavior with pre-silicon models and simulations.
• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Education - Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, Microelectronics, or a related field.
• Experience - Minimum 5 years of relevant digital integrated circuit or ASIC design experience.
• Skills - Demonstrated experience with RTL design and verification using Verilog, SystemVerilog, VHDL, or equivalent hardware-description languages.
• Skills - Experience with ASIC design flows including synthesis, static timing analysis, clock/reset methodology, design-for-test, physical implementation, timing closure, and signoff.
• Skills - Strong understanding of synchronous digital design, clock-domain crossing, reset-domain crossing, low‑power design concepts, and PVT‑related timing behavior.
• Skills - Proficiency with industry‑standard digital design, verification, implementation, and analysis tools and the ability to independently debug complex pre‑silicon and silicon issues.
• Travel - Up to 10%.
• Fluency in English Language - written & verbal.

Preferred Qualifications:

• Education - Master’s degree or PhD in Electrical Engineering, Computer Engineering, Microelectronics, or a related field.
• Experience - Experience with cryogenic CMOS, quantum‑control electronics, mixed‑signal SoCs, high‑speed interfaces, or other advanced digital applications.
• Skills - Experience with digital standard‑cell libraries, characterization, timing/power models, or digital‑flow enablement for new semiconductor technologies.
• Skills - Familiarity with formal verification, UVM, FPGA prototyping, DFT/scan, memory interfaces, processors, DSP, serializers/deserializers, or high‑speed digital architectures.
• Skills - Experience with silicon bring‑up, characterization, and correlation of measured results to RTL, gate‑level, timing, or power models.
• Skills - Familiarity with design and verification automation using Python, Tcl, Perl, or equivalent scripting languages.
• Project management skills - i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills.
• Strong planning & organizational skills.

Job Complexity Shows mastery of a technical discipline and is recognized within the company as a senior member of a technical team. Initiative and creativity result in high degree of innovation while showing the capacity to solve major problems of an advanced complexity within his/her area of expertise. Solves complex, novel and non‑recurring problems. Contributing inventor on a few patents. Contributing author on conference or journal publications. Accountability Works on and leads medium to large projects and assignments. Coaches and mentors less experienced staff, influences others as a technical leader. Regularly provides specialized technical guidance to others in work area. Participates in and/or leads cross‑functional teams across sites. Relationship Focus Limited and supervised contact at engineering and logistical level. Serves as a member of the conference committees. Actively participates in external programs. Initiates projects with suppliers. Attends and participates in consortia technical reviews. Knowledge, Skills & Abilities Increased knowledge plus broader technical knowledge that facilitates more integrative thinking. Requires a technical (University) degree. (Exceptions approved by local HR). BS + 6-7 years of experience or MS + 5-6 years or PhD + 3-4 years

Expected Salary Range $98,000.00 - $202,000.00 The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case‑by‑case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre‑employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law We shape what's essential At GlobalFoundries you will find a vibrant work environment where collaboration and innovation thrive. Our diverse and global team shares a culture of respect and inclusivity, representing the best in the industry. We celebrate success together and are united by our dedication to excellence and our desire to improve and empower the world.