CPU Verification Engineer

AMD; Fort Collins (CO); On-site; USD 125,000 - 190,000; Full time

Job summary

AMD is seeking a hands-on verification engineer for its Cores organization to own functional verification of L2 and L3 cache subsystems. You will design C++ verification infrastructure, develop test programs, and drive sign-off readiness with architecture, RTL, and physical design teams.

Strong C++ skills and cache expertise are essential.

Qualifications

• Experience in functional verification on high-performance CPU or ASIC/SoC designs.
• Expert C++ programming skills with large-scale verification environment experience.
• Strong understanding of cache architecture, coherence protocols, and memory hierarchy.
• Proficiency in Python or Perl scripting for test automation and coverage analysis.
• Familiarity with industry-standard RTL simulation and debug tools.

Responsibilities

• Own functional verification of L2 and L3 cache subsystems across block, cluster, and full-chip hierarchies.
• Design and build C++ verification infrastructure including behavioral reference models, scoreboards, and checkers.
• Develop C and assembly test programs to validate cache coherence, replacement policies, and architectural corner cases.
• Drive regression quality and coverage closure to tape-out standards.
• Serve as the technical authority in design reviews and sign-off readiness assessments.
• Apply AI-assisted tools and workflows as part of an innovative, modern verification practice.
• Mentor peers and elevate team quality through code reviews and technical discussion.

Skills

C++

Cache architecture

Coherence protocols

Python/Perl scripting

Functional verification

Team collaboration

Education

Bachelors/Masters in EE/CE/CS

Tools

RTL simulation tools

Debug tools

Scoreboards

Behavioral reference models

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next‑gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

The Role

As a member of AMD's Cores organization, you will help verify the cache subsystems powering the world’s leading processors. Working closely with architecture, RTL design, and physical design teams, you will take ownership of functional verification for L2 and L3 cache designs from block level through full‑chip integration, driving programs to tape‑out with confidence.

The Person

A successful candidate is a individual contributor who remains deeply hands‑on. The candidate will have expert C++ skills, a strong understanding of cache architecture and coherence protocols, and a track record of delivering clean verification sign‑off on high‑performance processor designs. Strong problem‑solving skills, attention to detail, and the ability to influence across teams without formal authority are essential.

Key Responsibilities

• Own functional verification of L2 and L3 cache subsystems across block, cluster, and full‑chip hierarchies.
• Design and build C++ verification infrastructure including behavioral reference models, scoreboards, and checkers.
• Develop C and assembly test programs to validate cache coherence, replacement policies, and architectural corner cases.
• Drive regression quality and coverage closure to tape‑out standards.
• Serve as the technical authority in design reviews and sign‑off readiness assessments.
• Apply AI‑assisted tools and workflows as part of an innovative, modern verification practice.
• Mentor peers and elevate team quality through code reviews and technical discussion.

Preferred Experience

• Very Experienced in functional verification on high‑performance CPU or complex ASIC/SoC designs.
• Expert C++ programming skills with experience building large‑scale verification environments.
• Strong understanding of cache architecture, coherence protocols, and memory hierarchy.
• Proficiency in Python or Perl scripting for test automation and coverage analysis.
• Familiarity with industry‑standard RTL simulation and debug tools.

Academic Credentials

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science preferred.

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s Responsible AI Policy is available here.

This posting is for an existing vacancy.