CPU Cache Subsystem Senior Design Manager

Google Inc.; Austin, Mountain View (TX, CA); On-site; USD 240,000 - 333,000; Full time

Job summary

Google Inc. is seeking a senior CPU design lead to own frontend design for advanced CPU subsystems.

You will guide RTL development, align micro-architecture with SOC targets, and work across architecture, software, verification, power, DFT and physical teams to meet project milestones. You will drive decisions on complexity, performance, power and area while mentoring a team to deliver high-quality RTL on schedule.

Qualifications

• Bachelors in Electrical Engineering, Computer Science or equivalent is required.
• 15 years of CPU design experience including load-store unit logic and caches.
• Proven leadership of teams for modern processor subsystems with high speed, low power design.
• Experience with front-end quality checks (e.g., Lint, CDC/RDC).

Responsibilities

• Lead and manage a front-end design team for CPU subsystems.
• Define micro-architecture and schedule RTL delivery for target SOCs.
• Collaborate with architecture, software, verification, power, DFT, and physical design teams.
• Evaluate design options considering complexity, performance, power and area.
• Focus on load-store-unit and cache subsystem design and optimizations.

Skills

Outcome ownership

Decision making

Stakeholder influence

Frontend design leadership

RTL/CPU design knowledge

Education

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience

Tools

RTL design tools

CPU/SoC design tooling

Job description

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corporate_fare Google place Austin, TX, USA ; Mountain View, CA, USA ; +3 more ; +2 more

Advanced

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders;deep expertise in domain.

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info_outline X Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 15 years of experience in CPU design, including load-store unit logic/RTL and L2/L3 private/shared caches including micro-architecture definition and PPA processing.
• Experience leading and managing teams for modern processor subsystems with high speed, lower power design.
• Experience with front-end quality checks (e.g., Lint, CDC/RDC).

Preferred qualifications:

• Experience with ARM instruction set architecture.
• Experience with mobile CPU subsystem.
• Experience with mobile SOC architecture/integration.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will contribute to all phases of complex designs of CPU subsystems from design specification to productization, including integration into target SOCs.

You will lead and manage a front-end design team, collaborate with members of architecture, software, verification, power, DFT, physical design teams to define the micro-architecture and schedule in delivering high quality RTL that meets project goals.

You will help your team grow and solve technical problems with innovative micro-architecture and practical logic solutions. You will be responsible for evaluating and deciding on the best design options with complexity, performance, power and area and schedule in mind.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will contribute to all phases of complex designs of CPU subsystems from design specification to productization, including integration into target SOCs.

You will lead and manage a front-end design team, collaborate with members of architecture, software, verification, power, DFT, physical design teams to define the micro-architecture and schedule in delivering high quality RTL that meets project goals.

You will help your team grow and solve technical problems with innovative micro-architecture and practical logic solutions. You will be responsible for evaluating and deciding on the best design options with complexity, performance, power and area and schedule in mind.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $240000 - $333000 (USD) + 25% bonus target + equity + benefits

Learn more about benefits at Google .

• Lead and manage a team of design engineers working on CPU functional units, emphasizing on micro-architecture and RTL design for the next generation CPU subsystem.
• Review/propose performance enhancing micro-architecture features, and work with Software, Architect and Performance teams for trade-off studies. Communicate the pros and cons of micro-architecture enhancements.
• Deliver with plans on achieving project milestones and goals, towards a design that meets production quality on schedule.
• Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.
• Focus on load-store-unit and cache subsystem design and optimizations with other parts of CPU to deliver best Performance, Power, Area (PPA).

Google is proud to be an equal opportunity and affirmative action employer.

We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law.

See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.