Compiler Engineer

BoolSi, Inc.; Boston, Northern (MA, KY); Hybrid; USD 150,000 - 190,000; Full time

Benefits offered by this job

Factorio megabase screenshot

Job summary

BoolSi Inc. seeks a Compiler Engineer to own and expand the front-end that translates high-level C/C++/Rust programs into hardware-ready representations. You will collaborate with ML and hardware teams to ensure safe lowering and clean handoff to silicon.

You will build analysis, fuzzers, and transformations, working with LLVM/MLIR, and engaging with FPGA/HLS workflows to enable scalable hardware acceleration for software developers.

Qualifications

• Strong C and C++ with deep language semantics and UB awareness.
• Hands-on compiler internals experience (LLVM, GCC, MLIR).
• Solid knowledge of SSA, dataflow, CFGs, and abstract interpretation.
• Experience building tools that read and rewrite real code (instrumentation, fuzzers).
• Familiarity with FPGA or HLS flows; ability to hand work to hardware teams.
• Open-source compiler contributions are a plus.

Responsibilities

• Grow the front-end to handle more language features and patterns.
• Analyze and prove properties of user functions and what they touch.
• Build white-box fuzzers and data-generation harnesses for training signals.
• Design program transformations and reshape code for model convergence.
• Extract and operate on program representations (CFGs, DFGs, IR).
• Define contracts with ML team and computer architects for clean compiles.

Skills

Strong C and C++

Compiler internals

SSA / dataflow

Program analysis

Instrumentation & fuzzers

Open-source contributions

FPGA / HLS familiarity

Debugging

Software-hardware boundary

Education

B.S. in CS/CE/EE

Tools

LLVM

GCC

MLIR

Vivado

Vitis HLS

Job description

Own the front-end that turns C, C++, and Rust programs into executables our ML pipeline transforms into custom hardware.

BoolSi turns a hotspot in C, C++, or Rust into custom hardware accelerators and the drivers to run it: no HDL, no chip-design team in the loop. You own the front-end: everything between a developer's source code and the ML pipeline that converts it into hardware.

The twist is that we compile a program’s behavior, not its text. A trained model converges into an exact digital circuit (that’s the ML team), and our computer architects carry that circuit the rest of the way onto the fabric. You don’t write RTL or close timing in Vivado. You work the software side of the seam: ingest arbitrary high-level code, isolate the hotspot, prove the properties that make it safe to lower, and replace the source with a same-signature driver that talks to the hardware.

Software is sequential; hardware is spatial. You stand between them, translating what a program means into something a circuit can be trained to match, then handing it off clean to the people machines who build the silicon. Done right, the front-end is what puts custom hardware within reach of the ten million software developers who will never touch an HDL.

What you’ll do.

• Grow the front-end to swallow ever more of what real programs do (language features, patterns, whole classes of user code), toward the goal of compiling anything a developer hands us.
• Analyze and prove properties about user functions: what they touch, what they assume, and what makes them safe and sound to lower onto hardware.
• Build white-box fuzzers and data-generation harnesses that exploit the structure of the input program to produce the training signal the model learns from.
• Design program transformations: insert probes, decompose a hotspot into composable sub-programs, and reshape code into a form the model can converge on.
• Extract and operate on program representations: CFGs, DFGs, and the IR that everything downstream depends on.
• Define the contract with the ML team and the computer architects, so what you hand off compiles cleanly to hardware, without owning circuit correctness or quality yourself.

What you’ll bring.

• Strong C and C++, with a real grasp of language semantics, undefined behavior, and what a compiler is and isn’t allowed to assume.
• Hands‑on compiler internals (LLVM, GCC, MLIR, or comparable): IR design, pass management, and program analysis.
• Solid analysis fundamentals: SSA, dataflow, control‑ and data‑flow graphs, abstract interpretation.
• Experience building tools that read and rewrite real code: instrumentation, transformation passes, fuzzers, or test generation.
• Enough hardware fluency to work with the architects (the basic shape of an FPGA, why spatial compute is different) without needing to write RTL yourself.
• Strong debugging instincts and the discipline to make a flaky pipeline reproducible.
• A degree in CS, CE, or EE, or equivalent experience shipping a real toolchain.
• Formal verification, equivalence checking, or abstract interpretation applied to real programs.
• White‑box or coverage‑guided fuzzing, symbolic or concolic execution, automated test generation.
• Program instrumentation and dynamic analysis: sanitizers, tracing, profilers.
• Polyhedral optimization, auto-vectorization, or ML‑guided compilation.
• Open-source compiler contributions. LLVM or MLIR upstream is a strong plus.
• Familiarity with FPGA or HLS flows (Vivado, Vitis HLS), not because you’ll live in them, but because you’ll be handing work to the people who do.
• A screenshot of your Factorio megabase

Send us your CV.

Email your CV with the subject line "Compiler Engineer Application," plus a couple of lines on what you’d want to work on. We review applications on a rolling basis and aim to reply within a week.

BoolSi is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status.