Circuit Design Engineer - Library

Apple Inc.

Beaverton (OR)

On-site

USD 142,000 - 263,000

Full time

7 days ago
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Job summary

Apple Inc. in Beaverton, Oregon, seeks a Circuit Design Engineering Lead within the Digital Design Engineering group to guide a small team and advance high‑performance, low‑power standard‑cell design. You’ll own critical circuit blocks and drive PPA improvements for cutting‑edge ASICs.

You'll collaborate across CPU/SOC/GPU teams, manage QA and PDV workflows, and coordinate with foundries on iPDK and DRM requirements while migrating to new PDKs. Relocation support may be available.

Qualifications

  • Bachelor's Degree plus minimum 3 years of experience.
  • 3+ years of experience in Standard cells circuit development.
  • Experience leading and mentoring a small team.
  • Experience in designing standard cells, Power Management Cells and flop designs.
  • Knowledge of DRM, DRC/LVS decks and iPDK requirements.

Responsibilities

  • Drive development of high performance, low power standard cells to improve PPA.
  • Develop level shifters and retention designs for low power.
  • Collaborate with CPU/SOC/GPU teams for chip-level integration.
  • Oversee QA checks and develop new methodologies.
  • Coordinate with foundries on layout checkers and iPDK requirements.
  • Plan and drive development of designs and tech node enablement.
  • Manage migration to new PDK and PDV of standard cells and releases.

Skills

Standard cells circuit development
Team leadership
Interpersonal skills
Cross-functional collaboration
Perl or TCL scripting

Education

Bachelor's Degree

Tools

Virtuoso
DRM
DRC/LVS decks
PDV flows

Job description

Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? Do you have a passion for crafting entirely new solutions? Do you love building without precedent? As part of our Digital Design Engineering group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing visionary ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuit Design Engineering Lead. In this highly visible role, you will be at the heart of a processor design effort, leading custom digital circuits team and library development, making a critical impact delivering products to market quickly.

Description
  • Drive development of high performance, low power optimized standard cells to improve design PPA.
  • Drive development of optimal level shifters, retention designs, etc that cater to today’s Low Power Design Requirements.
  • Identify next generation of new ideas to drive PPA improvements further
  • Engage with CPU, SOC and GPU teams on chip level integration requirements.
  • Drive Circuit QA checks & analysis, develop new methodologies based on new design requirements.
  • Work with foundries on DRM complaint layout checkers and iPDK requirements.
  • Plan & drive development of designs like new circuits & tech node enablement.
  • Manage migration to new PDK, PDV of standard cells & releases.
Preferred Qualifications
  • We are looking for applicants with 3+ years of experience in Standard cells circuit development.
  • Proven experience in developing, driving & implementing circuit methodologies
  • Proven experience leading & mentoring a small team
  • Strong influence, excellent interpersonal skills & able to work with multi-functional teams
  • Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.
  • Design experience in advanced tech node device behavior with understanding of layout rules.
  • Design experience in flop, complex Standard Cells design & Power Management Cells.
  • Knowledge of circuit robustness analysis
  • Experience in scripting in Perl and/or TCL.
Minimum Qualifications
  • Bachelor's Degree + minimum of 3 years of experience
Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $142,300 and $263,300, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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