Chiplet Design Lead, SoC

Analogue Insight LTD; United States; Remote; USD 120,000 - 180,000; Full time

Job summary

Join an innovative company at the forefront of technology, where you will lead the design and development of cutting-edge SoC architectures. As a SoC Chiplet Design Lead, you will drive projects from concept to production, collaborating with cross-functional teams to create high-performance chiplet solutions. This fully remote role offers the opportunity to work with advanced technologies and mentor junior engineers, fostering a culture of excellence and continuous improvement. If you are passionate about bridging the analogue and digital worlds, this is the perfect opportunity for you.

Qualifications

• 8+ years of experience in SoC design and development.
• Strong expertise in RTL design using Verilog or SystemVerilog.
• Proficient in SoC verification methodologies and tools.

Responsibilities

• Lead the end-to-end development of SoC chiplet designs.
• Oversee RTL design, DFT architecture, and SoC verification.
• Mentor and develop junior engineers in SoC design.

Skills

SoC Design

RTL Design (Verilog/SystemVerilog)

SoC Verification (UVM, SystemVerilog)

Project Management

Problem-Solving

Communication

Education

Bachelor's Degree in Electrical Engineering

Master's Degree in Computer Engineering

Tools

EDA Tools (Synopsys, Cadence, Mentor Graphics)

Design-for-Test Techniques

Low-Power Design Techniques

Job description

Company Description

Established in early 2024, at Analogue Insight we are Bridging the Analogue and Digital Worlds for Tomorrow's through our Chiplet Solutions. Our core expertise lies in developing cutting-edge Chiplet technology that serves as the building block for advanced communication systems. Our Chiplets are designed to offer high performance, scalability, and integration flexibility, enabling our clients to achieve breakthroughs in computation speed, data processing, and connectivity.

The SoC Chiplet Design Lead will be responsible for leading the design and development of complex System-on-Chip (SoC) architectures. This role requires a deep understanding of SoC design principles, strong leadership skills, and the ability to drive cross-functional teams towards successful project completion.This role is fully remote.

Key Responsibilities

• Lead the end-to-end development of SoC chiplet designs, from concept to tape-out.
• Work with the architecture, systems and packaging teams to explore tradeoffs around performance, power, features and cost.
• Oversee and contribute to RTL design, DFT architecture, SoC verification, synthesis, and timing closure.
• Collaborate with software, hardware, verification and PnR teams to ensure seamless integration and functionality.
• Conduct design reviews and provide technical guidance to the design team.
• Work closely with the project management team to define project timelines and deliverables.
• Manage external vendors and IP providers to integrate third-party components into the SoC.
• Stay current with industry trends and advancements to ensure our SoC designs remain cutting-edge.
• Mentor and develop junior engineers, fostering a culture of continuous learning and improvement.
  

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of experience in SoC design and development.
• Proven track record of leading successful SoC projects from concept to volume production.
• Strong expertise in RTL design using Verilog or SystemVerilog.
• Proficient in SoC verification methodologies and tools (UVM, SystemVerilog, C/C++, Coco-TB, etc.).
• Experience with synthesis, place-and-route, and timing analysis.
• Familiarity with Design-for-Test and Design-for-Debug ideas and architecture.
• Familiarity with embedded software development and hardware/software co-design.
• Excellent problem-solving skills and attention to detail.
• Strong communication and leadership skills, with the ability to work effectively in a team environment.

Preferred Qualifications

• Experience with advanced process nodes (e.g., 7nm, 5nm).
• Knowledge of low-power design techniques.
• Experience with CPU (ARM and RISCV) integration.
• Experience with AI/NPU integration.
• Experience with NoC integration.
• Experience in interconnect protocols - CHI, AXI, AMBA, AHB, APB, OCP, STBus, DTL
• Experience with high-speed interface design (PCIe, UCIe, DDR, Ethernet, etc.).
• Familiarity with EDA tools from vendors such as Synopsys, Cadence, or Mentor Graphics.