Chip Simulation Software Intern

Etched

San Jose (CA)

On-site

USD 134,000 - 201,000

Full time

14 days+
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Benefits offered by this job

12-week internship
Housing support
Daily meals
In-person mentorship
San Jose office
Challenging projects

Job summary

Etched is seeking talented students for a Fall/Spring/Summer 2026–27 internship in San Jose, CA. You will co-design, develop, and test simulations of our hardware and tools, collaborating with software and hardware teams across the development path.

This is a hands-on opportunity to work at the cutting edge of hardware innovation. The 12-week program includes housing support, daily meals, direct mentorship from industry leaders, and the chance to tackle one of the most important problems in AI

Qualifications

  • Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
  • Proficiency in C/C++ or Rust.
  • Strong fundamentals in data structures and algorithms.
  • Strong understanding of low‑level software engineering.
  • Strong understanding of hardware/software co‑design.
  • Excellent communication and collaboration skills.

Responsibilities

  • Co-design, develop, and test simulations of our custom hardware and tools.
  • Coordinate with software and hardware teams across the development path.

Skills

C/C++
Rust
Data structures and algorithms
Low-level software engineering
Hardware/software co-design
Communication & collaboration

Education

Bachelor’s/Master’s/PhD in CS/Engineering or related field

Tools

Linux internals
Kernel development
CI/CD pipelines
Embedded development

Job description

About Etched

Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real‑time video generation models and extremely deep & parallel chain‑of‑thought reasoning agents. Backed by hundreds of millions from top‑tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

The role

Our chip simulation and tooling role will co‑design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Fall ’26, Spring ’27, and Summer ’27 interns.

You may be a good fit if you have
  • Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
  • Proficiency in C/C++ or Rust.
  • Strong fundamentals in data structures and algorithms.
  • Strong understanding of low‑level software engineering.
  • Strong understanding of hardware/software co‑design.
  • Excellent communication and collaboration skills.
Strong Candidates May Also Have (Nice To Have Qualifications)
  • Experience with Linux internals, kernel development, or driver debugging.
  • Experience with hardware diagnostics or interpreting hardware logs.
  • Exposure to server virtualization or CI/CD pipelines.
  • Experience with Rust or embedded development.

We encourage you to apply even if you do not believe you meet every qualification.

Program details
  • 12‑week paid internship.
  • Generous housing support for those relocating.
  • Daily lunch and dinner in our office.
  • Based at our office in San Jose, CA.
  • Direct mentorship from industry leaders and world‑class engineers.
  • Opportunity to work on one of the most important problems of our time.

For any questions, contact internships@etched.com.

How We’re Different

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model‑specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single‑model ASICs.

We are a fully in‑person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

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