Chief SoC Architect — AI Compute & Systems Leadership

SBT; San Francisco (CA); On-site; USD 250,000 - 360,000; Full time

Job summary

SBT is seeking a Head of SoC Architecture in San Francisco to lead the overall SoC and system architecture across multiple silicon programs. You will partner with executive leadership to translate business objectives into actionable silicon roadmaps and drive 0-to-1 architecture development from concept to platform strategy.

The role requires deep experience in high-performance silicon, ownership of multiple chip cycles, and the ability to balance performance, power, area, and cost across

Qualifications

• Extensive experience leading high-performance silicon programs.
• Ownership of chip development cycles from definition to production deployment.
• Strong understanding of compute subsystems, memory hierarchy, interconnects, I/O, and power management.

Responsibilities

• Own the overall SoC and system architecture across multiple silicon programs.
• Translate business objectives and product strategy into silicon roadmaps.
• Lead 0-to-1 architecture development from concept to platform strategy.
• Drive architectural tradeoffs across performance, power, area, memory, interconnect, and cost.
• Define hardware/software interfaces and align subsystems.
• Provide technical direction to CPU, RTL, verification, software, and physical design teams.
• Guide programs through architecture, tapeout, bring-up, and production readiness.

Skills

SoC architecture

CPU architecture

System architecture

Leadership

Architectural tradeoffs

Job description

SBT is seeking a Head of SoC Architecture in San Francisco to lead the overall SoC and system architecture across multiple silicon programs. You will partner with executive leadership to translate business objectives into actionable silicon roadmaps and drive 0-to-1 architecture development from concept to platform strategy.

The role requires deep experience in high-performance silicon, ownership of multiple chip cycles, and the ability to balance performance, power, area, and cost across