CAD Extraction Engineer

Apple, Inc.; Austin (TX); On-site; USD 170,000 - 260,000; Full time

Job summary

Apple, Inc. in Austin, TX, is seeking a senior CAD engineer to join the Silicon Engineering group.

You will develop, maintain, and optimize parasitic extraction flows for Apple’s silicon designs, applying RC analysis to diagnose parasitics and guide improvements for balanced circuit performance and power efficiency. Experience with post-layout tools such as StarRC and Quantus, scripting in Shell, Perl, Python, TCL, and AIML workflows will help you build RC-aware methodologies and AI-driven

Qualifications

• BS + 10 years of relevant industry experience required.
• Strong experience in parasitic extraction and post-layout flows.
• Proven ability to diagnose and optimize RC effects in complex designs.

Responsibilities

• Develop, maintain and optimize parasitic extraction flows for Apple silicon.
• Apply RC analysis to diagnose parasitics and guide improvements for performance.
• Develop RC-aware methodologies using EDA tools and scripting.
• Leverage AI/ML workflows to create efficient solutions for post-layout tasks.

Skills

RC analysis

EDA tools

Scripting

English

Big data analysis

Teamwork

AI/ML workflows

Education

BS degree + 10 years experience

Tools

StarRC

Quantus

Job description

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance of every detail? As part of our Silicon Engineering group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do everything they love with their devices! In the CAD organization, you will create new software and technologies enabling other Apple engineers to develop products for millions of customers worldwide!

Description

As a member of our CAD team, you will develop, maintain, and enhance existing parasitics extraction flow for Apple's successful silicon designs. You will use the most efficient RC analysis skills on various designs to diagnose and debug parasitic effects, guide and design improvement for balanced and minimized parasitic impact. Your experience and proficient usage of EDA extraction tools and methodologies will ensure parasitic RLC accuracy and circuit performance in post-layout simulations. You will use AI technology to quickly develop solutions to solve user issues. You can develop an RC-aware or RC-driven methodology for design optimization with various solutions including EDA vendor solutions, effective scripts and complex software.

Minimum Qualifications

• Minimum requirement of BS + 10 years of relevant industry experience

Preferred Qualifications

• Proficient in post-layout custom design flow, including LVS, Extraction, and Simulations.


• Experience as a power user or developer with extraction tools like StarRC and Quantus.


• Experience in sophisticated script development using Shell, Perl, Python, and TCL.


• Familiar with AIML workflows and have development experience of Skills and Plugin, and/or VSCode development.


• Problem-solving attitude and positive teamwork.


• Experience in general big data analysis is a plus.


• Ability to fluently speak and write in English.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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