CAD Engineer

Element Technologies; San Francisco (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

Element Technologies in the Bay Area seeks an experienced CAD Engineer to support full lifecycle CAD flows and tool development for CMOS IC design. You will own PDK installation, validation, and release management, and coordinate tapeout submissions to foundries ensuring quality and schedule adherence.

The role requires deep expertise in Cadence, Synopsys, and Siemens tools, plus scripting in Perl/Tcl, Python, or MATLAB. Collaboration with vendors and cross-site teams is essential.

Qualifications

• BA/BS in Electrical Engineering, Computer Science, or related field.
• Minimum 7 years of analog and digital CMOS CAD support experience.
• Strong experience with major EDA tools and Linux scripting.

Responsibilities

• Provide full lifecycle support for CAD flows across multiple platforms.
• Own PDK installation, validation, maintenance and release management.
• Support tapeout flows and ensure compliance with foundry requirements.
• Assist schematic capture, analog/mixed-signal simulation, layout and verification.
• Develop CAD utilities and automation scripts to improve design efficiency.
• Collaborate with EDA vendors to resolve issues and influence product improvements.

Skills

CMOS CAD

EDA Tools

Scripting & Automation

Linux Proficiency

Communication Skills

Education

BA/BS in Electrical Engineering or Computer Science

Tools

Cadence Virtuoso

Cadence Spectre

Synopsys Design Compiler

Mentor Calibre/Calibre PVS

Mentor Questa

Job description

We need candidates for Bay Area for CAD Engineer role

Responsibilities:

• Provide full lifecycle support for custom CAD flows, including tool development, installation, configuration, maintenance and upgrades across Cadence, Synopsys, Siemens and Keysight platforms
• Own PDK installation, validation, customization, maintenance and release management, ensuring alignment with foundry and keeping up to date versions always ready
• Support and maintain end-to-end tapeout flows, including coordinating and executing tapeout submissions to foundries, ensuring compliance with foundry requirements, schedules and quality standards
• Support Schematic Capture, Analog and Mixed-signal Simulation, Layout and Layout Verification software and workflows using established revision-controlled processes
• Support and maintain digital simulation, verification environments, digital place-and-route tools
• Develop and maintain CAD utilities, automation scripts and regression flows to improve design efficiency and consistency
• Perform Functional Evaluation, Performance Benchmarking and Deployment of New Tools
• Provide CAD Software & Linux User Support for CMOS Design Engineers & IC Layout Designers
• Prepare and maintain clear user documentation, best practices and training material for design teams across sites
• Responsible for diagnosis, resolution, regression of reported problems in a timely manner
• Interfacing directly with EDA Vendors' Application and support teams to resolve and influence product improvements
• Support additional CAD-related initiatives and projects as assigned

Qualifications & Requirements:

• BA/BS Degree in Electrical Engineering, Computer Science or related field
• Minimum 7 years of experience with analog and digital new product development CMOS IC CAD support using EDA tools
• Must have experience supporting:
• 1. Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus, Tempus
• 2. Siemens Analog Fast-Spice, Questa, Parasitic CALIBRE PVS, XRC
• 3. Synopsys Design Compiler, VCS, SpyGlass and other tools
• Programming languages: DFII SKILL, PERL, MATLAB, Tcl/Tk, C / C++, Python
• Proficient at Linux OS, utilities, and scripting

Desired Characteristics & Attributes:

• Excellent written and verbal communication skills required
• Ability to work well with others in a fast-paced collaborative team environment
• Strong problem-solving skills, attention to detail and a proactive approach to continuous improvement.