Bench Test Engineer: Silicon Debug & High-Speed IO

Socket.dev; San Diego (CA); On-site; USD 94,000 - 141,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking engineers for the Post Silicon Engineering group to lead silicon debug and high-speed interface analysis.

You will develop test methodologies for LP-DDR and PC-DDR subsystems, automate tests, and drive data‑driven decisions across cross‑functional teams. Preferred candidates have 1–3+ years of experience, Python/C# for automation, and a strong understanding of VLSI, signal integrity, and DDR protocols.

Qualifications

• Bachelor's degree in CS/EE or related field.
• 1–3+ years of related experience; fresh graduates welcome.
• Experience with Python/C# for test automation is required.
• Familiarity with DDR LPDDR/DDR protocols is a plus.
• Strong silicon debug and data-driven optimization skills.

Responsibilities

• Define and execute test methodologies and characterization of LP-DDR and PC-DDR subsystems.
• Develop characterization plans for High Speed IPs and drive first silicon bring-up.
• Perform parametric silicon analysis across PVT and configurations and drive root-cause analysis.
• Develop and automate test scripts and data processing to accelerate silicon evaluation.
• Collaborate with IC design, systems engineering, and customer teams to resolve issues.

Skills

Python

C# (C Sharp)

Test automation

Education

Bachelor's degree in CS/EE or related field

Master's degree in Electrical/Computer Engineering or related field

Tools

Oscilloscopes

TDRs / VNAs

J-BERT

Power measurement tools

Job description

Qualcomm Technologies, Inc. is seeking engineers for the Post Silicon Engineering group to lead silicon debug and high-speed interface analysis.

You will develop test methodologies for LP-DDR and PC-DDR subsystems, automate tests, and drive data‑driven decisions across cross‑functional teams. Preferred candidates have 1–3+ years of experience, Python/C# for automation, and a strong understanding of VLSI, signal integrity, and DDR protocols.