ASIC Validation Engineering Manager / Technical Lead

Yochana IT Solutions Inc.; Sunnyvale (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Yochana IT Solutions Inc. in Sunnyvale, CA seeks an Engineering Manager / Technical Lead for ASIC Validation to lead a high-impact silicon validation team supporting next-generation custom ASIC and hardware infrastructure initiatives.

You will combine deep technical leadership with hands-on engineering, drive pre-silicon validation, test automation, and CI/CD for hardware platforms, mentor engineers across global teams, and collaborate with ASIC design, firmware, and system groups to ensure

Qualifications

• 10+ years of experience in Software Development, Silicon Validation, or Test Engineering.
• 8+ years of ASIC/Silicon Validation experience.
• 3+ years of Engineering Management or Technical Leadership experience.
• Proficient in Python and C / Embedded C.

Responsibilities

• Lead and coordinate ASIC validation activities across multiple silicon programs.
• Mentor validation engineers across distributed teams.
• Develop, execute, and debug validation test suites for ASIC IP blocks.
• Drive pre-silicon validation using simulation and emulation platforms.
• Collaborate with ASIC design, architecture, platform, firmware, and system teams.
• Own validation planning, execution, defect tracking, and project delivery.
• Build and enhance Python-based automation and validation frameworks.
• Establish scalable CI/CD infrastructure for hardware validation.
• Lead technical reviews, root cause investigations, and customer-facing discussions.
• Monitor metrics, quality, and operational readiness across validation programs.

Skills

Python

C / Embedded C

Job description

We are seeking an experienced Engineering Manager / Technical Lead - ASIC Validation to lead a high-impact silicon validation team supporting next-generation custom ASIC and hardware infrastructure initiatives for a leading hyperscale technology company.

This role requires a unique blend of technical leadership and hands-on engineering expertise. The ideal candidate will have deep experience in pre-silicon validation, test development, automation, and team leadership while driving validation deliverables across multiple ASIC programs.

If you enjoy solving complex silicon challenges, mentoring engineers, and working closely with silicon design and platform teams, we'd love to hear from you.

What You'll Do

• Lead and coordinate ASIC validation activities across multiple silicon programs.
• Manage and mentor validation engineers across geographically distributed teams.
• Develop, execute, and debug validation test suites for ASIC IP blocks.
• Drive pre-silicon validation using simulation and emulation platforms.
• Collaborate with ASIC design, architecture, platform, firmware, and system teams.
• Own validation planning, execution, defect tracking, and project delivery.
• Build and enhance Python-based automation and validation frameworks.
• Establish scalable CI/CD infrastructure for hardware validation.
• Lead technical reviews, root cause investigations, and customer-facing discussions.
• Monitor metrics, quality, and operational readiness across validation programs.

Required Qualifications

10+ years of experience in Software Development, Silicon Validation, or Test Engineering

8+ years of ASIC/Silicon Validation experience

3+ years of Engineering Management or Technical Leadership experience

• Python
• C / Embedded C

Deep expertise in:

• ASIC/SoC/IP Validation Methodologies
• Simulation & Emulation Environments
• Test Framework Development and Debugging

Experience validating one or more:

• CPU Subsystems
• Memory Controllers
• Networking IP
• Accelerator IP

Experience with:

• Automation Frameworks
• Regression Infrastructure
• Defect Triage and Root Cause Analysis

Excellent customer-facing and stakeholder management skills

Experience leading globally distributed engineering teams

Preferred Qualifications

Post-Silicon Validation and Bring-Up

Hardware Validation CI/CD Infrastructure