ASIC Engineering Intern (Onsite) – Edge-to-Cloud Tech

Hewlett Packard Enterprise Development LP

Sunnyvale (CA)

Hybrid

USD 48,000 - 56,000

Full time

6 days ago
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Benefits offered by this job

Health & Wellbeing
Professional development
Inclusive culture

Job summary

Hewlett Packard Enterprise is seeking an ASIC Intern in Sunnyvale, California for a full-time internship, onsite at an HPE office. You will support senior team members on technical projects, help identify issues, and assist with hardware and software maintenance while learning project methodologies.

Applicants must be pursuing a Bachelor's degree in a technical field. Familiarity with Verilog/SystemVerilog or other languages (Python/Java/C++) is beneficial, along with strong communication and

Qualifications

  • Currently pursuing a bachelor's degree in a technical field such as Engineering, CS, or IT.
  • Course work in Digital logic Design and Computer architecture is preferred.
  • Experience taking a project from concept to implementation is a plus.

Responsibilities

  • Support senior team members on assigned technical projects.
  • Identify and troubleshoot technical issues, providing support and suggesting solutions.
  • Assist with maintaining and updating hardware, software, and other technical systems.
  • Participate in team meetings and learn project methodologies.
  • Engage in learning about new technologies and methodologies relevant to work.
  • Complete tasks assigned by a supervisor in a timely and efficient manner.

Skills

Verilog
SystemVerilog
Python
Java
C++

Education

Bachelor's degree in Engineering, Computer Science, Information Technology, or related technical field

Tools

Verilog
SystemVerilog

Job description

Hewlett Packard Enterprise is seeking an ASIC Intern in Sunnyvale, California for a full-time internship, onsite at an HPE office. You will support senior team members on technical projects, help identify issues, and assist with hardware and software maintenance while learning project methodologies.

Applicants must be pursuing a Bachelor's degree in a technical field. Familiarity with Verilog/SystemVerilog or other languages (Python/Java/C++) is beneficial, along with strong communication and

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