ASIC Engineer Intern

Hewlett Packard Enterprise; Sunnyvale (CA); On-site; USD 48,000 - 56,000; Full time

Job summary

Hewlett Packard Enterprise in Sunnyvale, CA is seeking an ASIC internship to gain hands‑on experience in design, verification, or tools & methodologies, working with senior engineers.

You will collaborate across teams, tackle learning opportunities, and participate in project reviews, with a focus on applying academic concepts to real‑world ASIC development.

Qualifications

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Coursework in Digital Logic Design, Computer Architecture, or VLSI Design is highly desirable.
• Familiarity with ASIC concepts through academic projects or internships is a plus.

Responsibilities

• Participate in ASIC architecture investigation tasks.
• Create detailed functional and micro‑architectural specifications
• Assist in RTL design using SystemVerilog, ensuring functionality, performance, and power goals.
• Support synthesis, linting, and design reviews.
• Develop and maintain testbenches using SystemVerilog and UVM.
• Write test plans, assertions, create functional coverage models, and debug simulation failures.
• Contribute to regression setup and results analysis.
• Participate in emulation activities for pre‑silicon validation.
• Contribute to automation to accelerate ASIC development processes, flow improvements, and EDA tool evaluations.
• Develop utilities to enhance productivity and improve design/verification processes.

Skills

SystemVerilog

UVM

Python

C++

Education

Bachelor’s or Master’s degree (ongoing) in Electrical Engineering, Computer Engineering, Computer Science

Digital Logic Design / Computer Architecture / VLSI Design coursework desirable

Job description

This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE partner/customer office.

Who We Are

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Overview

Job Description

Join our ASIC team as an intern and gain hands‑on experience in cutting‑edge semiconductor development. Interns will have the opportunity to focus on one of three specialized areas—ASIC Design, ASIC Verification, or ASIC Tools & Methodologies—based on their interests and skills. You are not expected to perform all three activities; instead, you will work closely with senior engineers in your chosen domain.

ASIC Design

• Participate in ASIC architecture investigation tasks, including evaluating design trade‑offs and performance analysis.
• Create detailed functional and micro‑architectural specifications
• Assist in RTL design using SystemVerilog, ensuring functionality, performance, and power goals.
• Support synthesis, linting, and design reviews.

ASIC Verification

• Develop and maintain testbenches using SystemVerilog and UVM.
• Write test plans, assertions, create functional coverage models, and debug simulation failures.
• Contribute to regression setup and results analysis.
• Participate in emulation activities for pre‑silicon validation.

Tools & Methodologies

• Contribute to automation to accelerate ASIC development processes, flow improvements, and EDA tool evaluations.
• Develop utilities to enhance productivity and improve design/verification processes.
• Work with EDA tools for physical design, including synthesis, place-and-route, timing analysis, and sign‑off flows.
• Support Design‑for‑Test (DFT) methodology development and integration.

General Responsibilities

• Collaborate with team members to troubleshoot technical issues and propose solutions.
• Participate in team meetings, learn project methodologies, and share progress during periodic reviews.
• Actively engage in learning new technologies and best practices relevant to your focus area.
• Complete assigned tasks efficiently and incorporate feedback.

Education & Experience

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Coursework in Digital Logic Design, Computer Architecture, or VLSI Design is highly desirable.
• Familiarity with ASIC concepts through academic projects or internships is a plus.

Knowledge & Skills

• Programming & Scripting: Exposure to SystemVerilog, UVM, and basic knowledge of Python, C++, or similar languages.
• Understanding of ASIC design flow, verification methodologies, and EDA tools for physical design.
• Strong analytical and problem‑solving skills.
• Excellent communication and interpersonal skills.
• Ability to manage time and meet deadlines.
• Passion for high‑tech and continuous learning.
• Knowledge of networking protocols, machine learning, or advanced computer architecture is a plus.

Accessibility

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here.

Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

What We Can Offer You

Health & Wellbeing

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

Personal & Professional Development

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

Unconditional Inclusion

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Let's Stay Connected

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Job

Administration

Job Level

N/A

Pursuing bachelors

"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. — United States of America: Hourly Salary USD 35.00 - 41.00 in California The listed salary range reflects base salary. Variable incentives may also be offered."

Pursuing masters

"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. — United States of America: Hourly Salary USD 40.00 - 46.00 in California The listed salary range reflects base salary. Variable incentives may also be offered."

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.

Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.