ASIC Design Engineer - New College Grad 2026

NVIDIA; Santa Clara (CA); On-site; USD 100,000 - 166,750; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA is seeking an ASIC Design Engineer for new college grads in Santa Clara. The role involves designing memory subsystem components for NVIDIA's SOC Interconnects, collaborating with various teams to meet complex specifications.

Qualified candidates will have a BS or MS in Electrical Engineering or related fields, and will be responsible for RTL design, synthesis, and more. The position offers a competitive salary range of $100,000 to $166,750 for Level 1, with eligibility for equity and benefits.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
• Familiarity with high-speed coherent interconnects and protocol bridges.
• Strong expertise in Verilog or VHDL.

Responsibilities

• Collaborate with design teams to deliver solutions for complex requirements.
• Responsible for micro-architecture and design activities including RTL design.

Skills

Verilog or VHDL proficiency

Scripting language proficiency (e.g., PERL)

Exposure to high-speed coherent interconnects

Experience with multiple clock domains

Knowledge of industry specifications (CHI, CXL, PCI-E)

Education

BS or MS in Electrical Engineering or Computer Engineering

Job description

ASIC Design Engineer – New College Grad 2026

Join our Memory Subsystem Team focused on designing memory subsystem components for NVIDIA SOC Interconnects, ordering controllers, and memory accelerators.

What you'll be doing:

• Collaborate with architects, design verification, formal verification, and physical design teams to deliver world‑class solutions for complex requirements of area, latency, power, bandwidth, and QoS.
• Responsible for micro‑architecture and design activities, including RTL design, synthesis, timing analysis, and use of innovative CAD tools and the latest process technologies.

What we need to see:

• Currently pursuing or recently completed a BS or MS in Electrical Engineering, Computer Engineering, or related degree (or equivalent experience).
• Exposure to high‑speed coherent interconnects, protocol bridges, hardware‑managed coherency, and system‑level caches is a plus.
• Experience with multiple clock domains and asynchronous interfaces is a plus.
• Knowledge of industry specifications such as CHI, CXL, PCI‑E is a plus.
• Strong proficiency in Verilog or VHDL.
• Scripting language proficiency, e.g., PERL.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $100,000 – $166,750 for Level 1, and $116,000 – $189,750 for Level 2.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 25, 2026.

This posting is for an existing vacancy.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.