ASIC Design and Integration Engineer

Apple Inc.; Santa Clara (CA); On-site; USD 175,000 - 313,000; Full time

Job summary

A leading tech company seeks an ASIC Design and Integration Engineer in Santa Clara, California. The ideal candidate will design high-performance memory systems and influence architecture decisions, leveraging extensive experience and technical expertise. Competitive compensation, comprehensive benefits, and opportunities for professional growth are offered.

Benefits

Comprehensive medical and dental coverage

Retirement benefits

Discounted products and services

Education reimbursement for career advancement

Discretionary stock unit awards

Employee Stock Purchase Plan

Potential bonuses or commission payments

Relocation assistance

Qualifications

• 10+ years of experience in ASIC design for high-performance systems.
• Experience with memory subsystem architectures is a plus.
• Strong background in performance characterization and documentation.

Responsibilities

• Develop and research new memory system architectures.
• Characterization of performance for system-on-chip designs.
• Work with teams to simulate and model performance/power.

Skills

ASIC design

Architecture research

RTL/micro-architecture

Performance/system characterization

Education

Bachelor's Degree

Job description

Santa Clara, California, United States Hardware

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Description

The ideal candidate will have experience in ASIC design with:- Architecture research and/or development of memory or highly interconnected system architectures.- RTL/micro-architecture.- Knowledge of high-performance memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram interface calibration/training mechanisms and algorithms is a plus.- Systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.

Minimum Qualifications

• Bachelor's Degree with +10 Years of Experience

Preferred Qualifications

• Drive new memory system architectures from DRAM up.
• Explore architecture and feature trade-offs in system performance, area, and power consumption.
• Develop memory hierarchies for high performance parallel computer architectures. (system-on-a-chip SOC).
• Work with performance team to develop performance/power simulators, models and test suites.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

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