Analog Design Engineer

ovt

Santa Clara (CA)

On-site

USD 157,000 - 160,000

Full time

14 days+
Application generator

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Job summary

ovt is seeking an Analog Design Engineer to conduct design and development of image sensor technologies. You will work on transistor-level analog/mixed-signal circuits for CMOS image sensors using Cadence Virtuoso, perform chip floorplanning and layout, and collaborate with cross-functional teams to verify and optimize performance.

The role requires a Master's degree in Electrical/Electronic Engineering or related field with coursework in Analog IC Design and Data Converters.

Qualifications

  • Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electro-Optics, or related field with graduate coursework in Analog IC Design, Data Converters, and VLSI.

Responsibilities

  • Design and develop analog and mixed-signal circuits for CMOS image sensors using Cadence Virtuoso.
  • Perform whole chip floorplan design and pad frame.
  • Layout analog/mixed-signal circuits and collaborate with the layout engineer.
  • Verify designs with DRC, LVS, PERC; collaborate with verification, process, test and applications engineers.
  • Process and analyze readout data using MATLAB/Excel; debug and optimize sensor performance.
  • Contribute to circuit R&D and stay ahead of current technology.

Skills

Layout design
Floor planning
Testing power IC
Lab equipment
MATLAB
Excel
Data converters
Op-amps
Noise analysis
Cadence

Education

Master's degree in Electrical Engineering

Tools

Cadence Virtuoso
Siemens Caliber
AFSPICE
MATLAB

Job description

Job Title:

Analog Design Engineer

Job Duties:

Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso. Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with Digital Engineer to define and design the analog to digital interface. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors. Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Process the column readout data from the CMOS sensor using data processing software like Excel and MATLAB. Perform a performance check and conduct debug analysis based on the data results. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control.

Requirements:

Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineer, Electro-Optics, or a related field with graduate level course work of Analog IC Design, Data Converters, and VLSI Circuits and Technology.

  • Layout design and floor planning.
  • Testing and troubleshooting power IC.
  • Using lab equipment testing specific IC.
  • Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors, Optical filters.
  • Matlab and Excel to do signal processing, imaging processing and data analysis.
  • Feedback, opamp, switched-capacitor circuits, layout and mismatch, and noise.
  • Data converter systems and circuits, including ADC and DAC architecture such as flash, two-step, pipelined, algorithmic, successive-approximation, R-2R DACs.
  • Analysis and design of modern digital circuits. Design and analyze CMOS digital circuit. Use commercial software Cadence.

Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

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