Principal Analog Design Engineer

Celero Communications; San Jose (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Celero Communications in San Jose, CA is seeking an experienced Analog Design Engineer to join their innovative team. This role focuses on designing high-speed analog circuits for next-generation AI technologies.

The ideal candidate will have a Master’s degree in Electrical Engineering with at least 5 years of relevant experience. Strong communication skills and proficiency in design tools such as Virtuoso and Spectre are essential. The position offers a competitive salary range of $150,000 - $250,000 annually based on skills and experience.

Qualifications

• 5+ years of experience in analog circuit design.
• Strong experience in broadband amplification and clock generation.
• Familiarity with analog design verification tools.

Responsibilities

• Design high-speed analog circuits such as broadband amplifiers.
• Supervise analog layouts in advanced process nodes.
• Document circuit design specifications.

Skills

Analog design fundamentals

High-speed circuit design

Communication skills

Experience with design tools

Electromagnetic simulation

Education

Master’s degree or PhD in Electrical Engineering

Tools

Virtuoso

Spectre

ADE

EMX

HFSS

Job description

About the Job

Are you an Analog Design Engineer who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer – someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!

Locations

Preferred Location: Irvine, CA
Alternate Locations: San Jose, CA | Vancouver, BC | Ottawa, ON

Opportunities

Candidate will have the opportunity to architect and design circuits for high performance transceivers and other critical analog functions.

What You Will Do

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.).
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver.
• Design of custom passive components, from concept to silicon implementation.
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design spec creation.
• Silicon bring-up, debug and support.
• Team communication and documentation.

What You Will Bring

• Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience.
• Strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post-layout extraction tools) is a must.
• Experience in advanced CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area).
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus.
• Knowledge of the fundamentals of electromagnetism, lumped models and high-frequency design.
• Good understanding of analog layouts in FinFet and its effect on high-speed designs is a plus.
• Strong communication and documentation skills.

Salary Range for US

$150,000 - $250,000 Base Annually. The final offer will be determined based on job-related skills, experience, qualifications, and location.