Analog Circuit Design Engineer

Intel Corporation; Hillsboro (OR); Hybrid; USD 122,000 - 232,000; Full time

Job summary

Intel Corporation in Hillsboro, Oregon is seeking an Analog Circuit Design Engineer to design, develop, and optimize analog and mixed‑signal circuits powering advanced process nodes. You will work with cross‑disciplinary teams to deliver high‑performance, low‑power solutions for world‑class products.

Responsibilities include TX/RX paths, amplifiers, clocks and regulators; power/performance/area tradeoffs; IP modeling; and design verification.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering with 3+ years of experience
• Master's degree in Electrical or Computer Engineering with 2+ years of experience
• PhD in Electrical Engineering or Computer Engineering
• Experience with VLSI analog circuit design and small-signal analysis
• Experience with Synopsys and Cadence design tools and flows
• Experience with design optimization techniques related to performance, power, and area

Responsibilities

• Design and develop complex analog and mixed‑signal circuits
• Create and validate behavioral models for analog/mixed‑signal IPs
• Develop floorplans and layouts following design rules
• Conduct small‑signal analysis, stability testing, and compensation
• Collaborate with architecture, layout, and validation teams
• Author specifications and test plans for design verification

Skills

Analog circuit design

Small-signal analysis

System-level thinking

Cross-team collaboration

Education

Bachelor's degree in Electrical or Computer Engineering

Master's degree in Electrical or Computer Engineering

PhD in Electrical Engineering or Computer Engineering

Tools

Synopsys and Cadence design tools

Matlab

VS Code

Python

GitHub Copilot

Job description

Job Details: Job Description:

About Intel:

At Intel, we strive to create innovative technologies that shape the future of computing and empower every person and organization on the planet.

Position Overview

As an Analog Circuit Design Engineer, you will play a pivotal role in designing, developing, and optimizing cutting‑edge analog and mixed‑signal circuits that power Intel's advanced process nodes. You will collaborate with cross‑disciplinary teams to bring high‑performance, low‑power solutions to life, contributing to Intel's success in delivering world‑class products.

Key Responsibilities

• Design and develop complex analog and mixed‑signal circuits, including transmitters (TX), receivers (RX), amplifiers, filters, clocking systems, and on‑die voltage regulators
• Perform circuit analysis and tradeoffs to optimize power, performance, area, timing, and yield
• Create and validate behavioral models for analog and mixed‑signal IPs for system‑level integration
• Develop and oversee floorplans and layouts while ensuring adherence to design rules and robustness
• Conduct small‑signal analysis, stability testing, and compensation of feedback loops to meet performance specifications
• Collaborate with architecture, layout, and validation teams to ensure seamless integration of designs into products
• Author microarchitecture specifications, test plans, and documentation for design verification and validation
• Conduct post‑silicon validation and debug to ensure design functionality and performance meet product requirements
• Provide technical mentorship and contribute to design reviews to enhance team‑wide engineering excellence
• Leverage industry‑standard tools and methodologies, such as Synopsys and Cadence, for design and simulation
• Effective collaborator who works well across cross‑disciplinary teams including architecture, layout, and validation
• Strong problem‑solver with a system‑level mindset and the ability to navigate complex technical tradeoffs
• Committed to engineering excellence through mentorship, thorough documentation, and active participation in design reviews

Minimum Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience
• Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience
• A PhD in Electrical Engineering or Computer Engineering
• Years of experience must include VLSI analog circuit design, small‑signal analysis, and understanding of foundational digital design concepts
• Experience with Synopsys and Cadence design tools and flows
• Experience with design optimization techniques related to performance, power, and area

Preferred Qualifications

• Knowledge of high‑speed IO signaling, transmission line theory, and power delivery concepts
• Familiarity with PLLs, ADCs, DACs, switched‑capacitor circuits, and noise analysis methodologies
• Experience with scripting, Matlab, and post‑silicon characterization using lab tools such as oscilloscopes and signal generators
• Cross‑disciplinary knowledge in analog integration, RTL, static timing analysis, and power grid design
• Proven track record of system‑level understanding, problem‑solving, and effective collaboration in a team setting
• VS Code, Python, and GitHub Copilot skills

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location: US, Oregon, Hillsboro

Additional Locations: US, California, Folsom, US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust: N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site.

* Job posting details (such as work model, location or time type) are subject to change.

Additional Information

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.