AI Memory & Data Placement Architect

HP; Spring (TX); On-site; USD 190,000 - 274,000; Full time

Benefits offered by this job

Health insurance

Dental insurance

Vision insurance

Disability insurance

Employee assistance program

Flexible spending account

Life insurance

Generous time off

Job summary

HP is seeking a Distinguished Technologist to define a unified memory/storage data hierarchy for AI workloads. You will shape strategy roadmaps, optimize data placement, and drive cross‑functional collaboration with software and OS teams to maximize AI performance.

The role requires a deep background in electrical hardware design, memory architectures, and FPGA implementation, with 12+ years of related experience. On-site HP facilities offer robust benefits and leadership opportunities.

Qualifications

• Four-year or graduate degree in Electrical Engineering or related discipline.
• Typically 12+ years of work experience in electrical design or hardware development.

Responsibilities

• Architect memory/storage hierarchy across DRAM, SSD, and cache layers.
• Define data placement and movement policies across memory tiers.
• Optimize paging, prefetching, and streaming for AI workloads.
• Collaborate with OS/runtime teams on data orchestration.

Skills

Memory design

Hardware Architecture

FPGA

MATLAB

Schematic Capture

Oscilloscope

Education

Bachelors or Graduate Degree in Electrical Engineering or related field

Tools

MATLAB

Schematic Capture

Oscilloscope

Job description

HP is seeking a Distinguished Technologist to define a unified memory/storage data hierarchy for AI workloads. You will shape strategy roadmaps, optimize data placement, and drive cross‑functional collaboration with software and OS teams to maximize AI performance.

The role requires a deep background in electrical hardware design, memory architectures, and FPGA implementation, with 12+ years of related experience. On-site HP facilities offer robust benefits and leadership opportunities.