AI Hardware Compiler Engineer (MLIR/LLVM) — Santa Clara

Touchdown Labs; Santa Clara (CA); On-site; USD 185,000 - 245,000; Full time

Job summary

Touchdown Labs seeks a Hardware Compiler Engineer to join their Santa Clara team. You will work on compiler infrastructure, lowering passes, and memory planning to map AI workloads onto novel hardware architectures.

The role emphasizes C++ development, MLIR/LLVM, and accelerator targets within a collaborative environment. Responsibilities include owning compiler passes, performance regression, and contributing to cross-functional hardware feedback.

Qualifications

• Proficient in compiler engineering with MLIR/LLVM.
• Experience targeting accelerators, FPGAs, or HLS.
• Strong C++ with compiler passes/backends experience.

Responsibilities

• Own compiler passes and lowering for active experiments.
• Measure results against models and baselines; document gaps for hardware.
• Develop and maintain compiler tests and performance regression suites.

Skills

C++

MLIR/LLVM

Compiler passes

Accelerator/HLS

Dataflow/Memory/Parallelism

Tools

Triton internals

TVM internals

Job description

Touchdown Labs seeks a Hardware Compiler Engineer to join their Santa Clara team. You will work on compiler infrastructure, lowering passes, and memory planning to map AI workloads onto novel hardware architectures.

The role emphasizes C++ development, MLIR/LLVM, and accelerator targets within a collaborative environment. Responsibilities include owning compiler passes, performance regression, and contributing to cross-functional hardware feedback.