AI Accelerator Software Engineer - Graph & Compiler

Ampere; Santa Clara (CA); On-site; USD 159,000 - 239,000; Full time

Benefits offered by this job

Health insurance

401K retirement plan

Unlimited flextime

Job summary

Ampere is seeking a Software Engineer for its AI Accelerator team to optimize deep learning graphs and maximize performance on Ampere hardware. You will work across the software stack from model frameworks to kernels, contributing to graph optimizations and runtime improvements.

You will collaborate with compiler, runtime, and hardware teams, applying CUDA, ROCm, OpenCL, SYCL, or Triton expertise to improve transformer and LLM workloads while ensuring energy-efficient, scalable inference.

Qualifications

• Bachelor’s degree in a technical field and 3–5 years of relevant experience, or a Master’s with 3+ years.
• Strong foundations in algorithms, data structures, and systems programming.
• Experience with Python and C/C++ in real-world projects or research.
• Familiarity with deep learning concepts, transformer models, and GPU/accelerator architectures.

Responsibilities

• Optimize deep learning computational graphs for performance, throughput, and energy efficiency on Ampere accelerators.
• Develop graph-level optimizations such as fusion, memory planning, and quantization.
• Analyze end-to-end performance across frameworks, runtimes, and hardware; build profiling infrastructure.
• Collaborate with compiler, runtime, kernel, architecture, and hardware teams on co-design.

Skills

Python

C/C++

Graph algorithms

Systems programming

Profiling

Education

Bachelor's degree in Computer Science / Computer Engineering or related field

Tools

CUDA

ROCm

OpenCL

SYCL

Triton

Job description

Ampere is seeking a Software Engineer for its AI Accelerator team to optimize deep learning graphs and maximize performance on Ampere hardware. You will work across the software stack from model frameworks to kernels, contributing to graph optimizations and runtime improvements.

You will collaborate with compiler, runtime, and hardware teams, applying CUDA, ROCm, OpenCL, SYCL, or Triton expertise to improve transformer and LLM workloads while ensuring energy-efficient, scalable inference.