(Staff/Sr. Staff) NPU Design Engineer

OMNIVISION; Singapore; On-site; SGD 125,000 - 150,000; Full time

Job summary

An established industry player is seeking a talented digital design engineer to take on a pivotal role in developing cutting-edge NPU architectures. This position involves hands-on microarchitecture design, RTL coding, and collaboration with verification teams to ensure robust performance and power optimization. With a focus on innovation, you will be part of a dynamic team that drives the future of technology. If you have a passion for digital design and a strong background in SoC design, this opportunity is perfect for you to make a significant impact in a forward-thinking environment.

Qualifications

• 8+ years of digital design experience with SoC design preferred.
• Hands-on experience in digital design and team leadership is required.

Responsibilities

• Develop design requirements and optimize microarchitecture for NPU.
• Collaborate with verification engineers and software teams for integration.

Skills

Digital Design

Microarchitecture Design

RTL Coding

Verilog/System Verilog

Team Leadership

Power Analysis

Communication Skills

Deep Learning Algorithms

Education

MSEE/BSEE in Electrical Engineering

MSEE/BSEE in Computer Engineering

Tools

UVM Verification Methodology

Job description

Responsibilities:

1. Develop design requirements of an NPU given system level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements:

1. 8+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on in digital design experience is a must.
4. Preferably has lead a team of at least 3 to 4 people in the past at the capacity of a design lead.
5. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
6. Experience in synthesis, with analysis of power, timing and area.
7. Disciplined, quality-minded, and highly driven for excellence.
8. Excellent team player and good communication skills.
9. MSEE/BSEE in Electrical Engineering or Computer Engineering.
10. Understanding of convolution operator and number system is required.
11. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
12. Experience in UVM verification methodology is a plus.
13. A plus to have SoC design experience.
14. Experience with optimizing micro-architectures for low-power and low-area is a plus.
15. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
16. Experience with past design experience with NPU / GPU / DSP design is a plus.
17. Experience with ARM or RISC-V processor systems is a plus.
18. Passionate and strong in general programming is a plus.