Staff Engineer - Edge AI & SLM/VLM R&D Lead

JABIL CIRCUIT (SINGAPORE) PTE. LTD.

Singapore

On-site

SGD 120,000 - 180,000

Full time

7 days ago
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Job summary

Jabil Circuit (Singapore) Pte. Ltd. seeks an engineer/researcher to lead R&D of Small Language Models and Vision-Language Models for edge/low-latency production.

You will own pretraining, SFT, and compression pipelines, and collaborate with platform teams to improve inference efficiency and model quality. You will build reproducible PyTorch training workflows, design efficient edge serving strategies, and architect robust tool-calling systems with observability and safe fallbacks.

Qualifications

  • Strong software engineering skills in Python and C++, including experience building ML training/evaluation pipelines in PyTorch.
  • Hands-on experience in model efficiency and inference optimization (e.g., distillation, quantization, pruning, serving optimization).
  • Experience with high-performance computing and acceleration: CUDA and/or SIMD, profiling and performance tuning.
  • Ability to read and reproduce key ideas from recent papers and implement algorithms with strong experimental discipline.
  • Ability to communicate effectively in both Chinese (Mandarin) and English as the successful candidate will have to liaise with our counterparts in China.

Responsibilities

  • Lead R&D of SLMs and VLMs for edge/low-latency production.
  • Own continuous pretraining and instruction tuning (SFT) pipelines.
  • Develop compression/distillation and inference optimization strategies.
  • Build PyTorch training workflows with data processing, training, evaluation, and versioning.
  • Design a production-grade tool calling framework with cataloging, routing, validation and observability.
  • Apply RL/reward modeling to improve alignment and tool-use reliability.
  • Automate data pipelines for collection, cleaning, curation and dataset versioning.
  • Evaluate with offline benchmarks, regression tests and A/B comparisons.

Skills

Python
C++
PyTorch
ML training pipelines
Performance optimization

Tools

CUDA
SIMD
Profiling

Job description

Jabil Circuit (Singapore) Pte. Ltd. seeks an engineer/researcher to lead R&D of Small Language Models and Vision-Language Models for edge/low-latency production.

You will own pretraining, SFT, and compression pipelines, and collaborate with platform teams to improve inference efficiency and model quality. You will build reproducible PyTorch training workflows, design efficient edge serving strategies, and architect robust tool-calling systems with observability and safe fallbacks.

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