Senior Data Scientist, Edge AI & SLM/VLM Optimization

Jabil Circuit (Singapore) Pte Ltd; Singapore; On-site; SGD 140,000 - 230,000; Full time

Job summary

Jabil Circuit (Singapore) Pte Ltd is seeking a highly capable engineer/researcher to lead R&D of Small Language Models and Vision-Language Models for edge and low-latency production scenarios. You will own continuous pretraining, SFT, and compression/distillation workflows, delivering measurable improvements in inference efficiency and model quality.

You will design and implement a production-grade tool calling framework, optimize for low latency, and apply reward modeling to align outcomes with

Qualifications

• Strong software engineering in Python and C++, with ML training/evaluation pipelines in PyTorch.
• Hands-on experience in model efficiency and inference optimization (distillation, quantization, pruning, serving optimization).
• Experience with high-performance computing and acceleration: CUDA and/or SIMD, profiling and tuning.
• Ability to read/reproduce ideas from recent papers and implement algorithms with experimental discipline.
• Ability to communicate effectively in English and Mandarin with counterparts in China.

Responsibilities

• SLM/VLM Training: Continuous pretraining and instruction tuning (SFT) for SLMs and VLMs.
• Build reproducible training workflows in PyTorch, including data processing, training, evaluation and versioning.
• Compression, distillation & edge/low-latency inference optimization, including quantization and caching strategies.
• Design tool calling framework: cataloging, routing, validation, fallbacks, and observability.
• Apply RL & reward modeling techniques (PPO/DPO/GRPO-like) for alignment and tool-use reliability.
• Design automated data pipelines for collection, cleaning, curation, labeling and dataset versioning.
• Establish rigorous evaluation suites: offline benchmarks, A/B tests, regression checks.

Skills

Python

C++

PyTorch

CUDA

English & Mandarin

Model optimization

Tools

ML pipelines

Job description

Jabil Circuit (Singapore) Pte Ltd is seeking a highly capable engineer/researcher to lead R&D of Small Language Models and Vision-Language Models for edge and low-latency production scenarios. You will own continuous pretraining, SFT, and compression/distillation workflows, delivering measurable improvements in inference efficiency and model quality.

You will design and implement a production-grade tool calling framework, optimize for low latency, and apply reward modeling to align outcomes with