SoC Video Codec & NPU Design Engineer

BYTEDANCE PTE. LTD.; Singapore; On-site; SGD 90,000 - 150,000; Full time

Job summary

ByteDance is seeking a strong video codec design engineer to help build industry‑leading SoC top/subsystems with RTL design in Verilog/SystemVerilog. You will work with a fast‑growing team spanning algorithm, architecture, software, firmware, and hardware verification to deliver scalable video platforms.

The role requires architecture thinking, HDL development, and collaboration across frontend/backend teams, with a focus on low power and high performance for billions of users.

Qualifications

• Bachelor's degree or higher in Microelectronics, ICs, CS, EE, or related field.
• 3+ years of experience in digital front-end design (open to highly promising candidates with less experience).
• Mastery of Verilog/SystemVerilog and solid foundation in digital circuits.
• Proficiency with front-end EDA tools: Spyglass, Design Compiler, PrimeTime.
• Fluent in at least one scripting language (Python, Perl, Tcl, Makefile).

Responsibilities

• Architecture design: define the architecture of SoC top or subsystems and evaluate power, performance, area.
• RTL implementation: write high-quality RTL code (Verilog/SystemVerilog) and maintain docs.
• Front-end quality control: perform Lint, CDC, and RDC checks for code quality.
• Cross-functional collaboration: work with Verification; support synthesis and timing analysis.
• Low power design: formulate chip low-power strategies using Clock/Power Gating and UPF.

Skills

Verilog/SystemVerilog

Digital front-end design

Scripting

Hardware design

Education

Bachelor's degree or higher in Microelectronics/ICs/EE

Tools

Spyglass

Design Compiler

PrimeTime

Job description

ByteDance is seeking a strong video codec design engineer to help build industry‑leading SoC top/subsystems with RTL design in Verilog/SystemVerilog. You will work with a fast‑growing team spanning algorithm, architecture, software, firmware, and hardware verification to deliver scalable video platforms.

The role requires architecture thinking, HDL development, and collaboration across frontend/backend teams, with a focus on low power and high performance for billions of users.