Silicon Design Engineer

XILINX ASIA PACIFIC PTE. LTD.; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

A leading technology company in Singapore is seeking a Design Verification Engineer to join their team. The ideal candidate will have a passion for modern processor architecture and possess strong skills in Verilog/SystemVerilog/UVM. Responsibilities include developing and maintaining tests for functional verification and providing technical support. A collaborative spirit and willingness to learn are essential for success in this role.

Qualifications

• Passion for modern, complex processor architecture, digital design, and verification.
• Excellent communication skills and experience collaborating with teams across timezones.
• Strong analytical and problem-solving skills.

Responsibilities

• Develop/Maintain tests for functional verification and performance verification.
• Build testbench components for next generation IP.
• Provide technical support to other teams.

Skills

Verilog/SystemVerilog/UVM

Collaboration

Analytical problem-solving

Education

Bachelors or Masters degree in computer engineering/Electrical Engineering

Tools

Perl/Python programming

Job description

THE ROLE:

We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

• Develop/Maintain tests for functional verification and performance verification at the core level
• Build testbench components to support the next generation IP
• Maintain or improve current test libraries to support IP level testing
• Create hardware emulation build to verify the IP functional performance
• Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility
• Provide technical support to other teams

PREFERRED EXPERIENCE:

• Good at Verilog/SystemVerilog/UVM
• Familiarity with SystemVerilog and modern verification libraries like UVM
• Experience/Background on SerDes/PCIe/Ethernet is a benefit
• Experience with Perl/Python programming is a benefit

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION:

Singapore