SG Analog/Mixed-Signal Verification Engineer

TetraMem - Accelerate The World; Singapore; On-site; SGD 80,000 - 180,000; Full time

Job summary

TetraMem - Accelerate The World is seeking a seasoned mixed-signal verification engineer to develop verification plans and sign off on designs for tapeout. You will design verification testbenches, write test cases, and review results with design teams to ensure functionality, performance, and reliability.

Requirements include a BS EE and 5+ years of relevant experience, with strong skills in analog/mixed-signal verification, programming (Perl/Python/C), and collaboration across cross-functional

Qualifications

• BS EE and 5+ years of relevant industry experience.
• Strong understanding of analog and mixed-signal verification principles.
• Ability to write test plans, present results, and communicate with cross-functional teams.
• Familiar with verification methodologies and tools: simulators, waveform viewers, automation, and coverage.
• Good programming skills in Perl, Python, and/or C.
• Excellent debugging and analytical abilities.
• Strong communication and teamwork skills.
• Familiarity with analog behavioral models is a plus.

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications.
• Design and develop verification testbenches using industry-standard verification languages and methodologies.
• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability.
• Review and analyze verification results, and provide feedback to design teams.
• Collaborate with design and layout teams to identify and resolve design issues.
• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability.
• Sign-off mixed signal designs in preparation for tapeout.

Skills

Analog design

Mixed-signal verification

Testbench design

Perl scripting

Python scripting

C programming

Debugging

Communication

Teamwork

Verification methodologies

Education

B.S. EE

Tools

Verilog

SystemVerilog

Simulators

Waveform viewers

Automation scripts

Job description

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
• Design and develop verification testbenches using industry-standard verification languages and methodologies
• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
• Review and analyze verification results, and provide feedback to design teams
• Collaborate with design and layout teams to identify and resolve design issues
• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
• Sign-off mixed signal designs in preparation for tapeout

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
• Design and develop verification testbenches using industry-standard verification languages and methodologies
• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
• Review and analyze verification results, and provide feedback to design teams
• Collaborate with design and layout teams to identify and resolve design issues
• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
• Sign-off mixed signal designs in preparation for tapeout

Requirements

• B.S. EE and 5+ years of relevant industry experience or equivalent
• Strong understanding of analog and mixed-signal circuit design and verification principles
• Ability to write test plans, present results, and communicate clearly with multi-functional teams
• Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection
• Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
• Excellent debugging, problem-solving and analytical skills
• Strong communication and teamwork skills
• Familiarity with analog behavioral models is a plus

Salary Range

S$80,000 - S$180,000 / year

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees.

We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds.

Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.

TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.