Senior Physical Verification Engineer - Advanced-Node ASIC Signoff

Bitdeer Technologies Group; Singapore; Presencial; SGD 120 000 - 180 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Comprehensive welfare benefits

Training and mentoring opportunities

Resumo da oferta

Bitdeer Technologies Group in Singapore is seeking a Senior or Staff Physical Verification Engineer to own the full PV flow from netlist to GDSII, ensuring silicon-proven, high-performance designs on cutting-edge process nodes.

You will perform PV signoff using Calibre, optimize runs, collaborate with Place & Route, and develop automation with Python, Perl, Tcl, and Make to improve tape-out efficiency.

Qualificações

• 5+ years of hands-on PV experience with advanced TSMC process nodes or similar.
• Experience with Calibre for DRC/LVS/ER/ANT checks.
• Strong understanding of IC design flow from netlist to tape-out.

Responsabilidades

• Perform PV signoff for ASIC/SoC designs, including DRC, LVS, ERC, and reliability checks.
• Monitor PV runs, manage resources, and track tape-out milestones.
• Collaborate with Place & Route to resolve full-chip layout issues.
• Support full PV flow from netlist to GDSII and contribute to automation.
• Develop scripts to improve tape-out efficiency and PD methodology.

Conhecimentos

Physical verification

Tape-out experience

Python scripting

Perl scripting

Tcl scripting

Make scripting

Formação académica

B.S. or M.S. in Electrical/Computer Engineering or related field

Ferramentas

Calibre tool

Descrição da oferta de emprego

Bitdeer Technologies Group in Singapore is seeking a Senior or Staff Physical Verification Engineer to own the full PV flow from netlist to GDSII, ensuring silicon-proven, high-performance designs on cutting-edge process nodes.

You will perform PV signoff using Calibre, optimize runs, collaborate with Place & Route, and develop automation with Python, Perl, Tcl, and Make to improve tape-out efficiency.