Senior Layout Engineer

ADVINNO TECHNOLOGIES PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Advinno Technologies in Singapore is seeking a Senior IC Layout Engineer to design and layout analog and mixed-signal circuits, collaborating with IC Design engineers to optimize layouts for power, performance and area.

You will perform physical design verifications (LVS/DRC/ERC), lead full-chip sign-off, and manage tape-out processes to meet project deadlines while maintaining design integrity and reliability.

Qualifications

• Bachelor's degree in Electrical and Electronics Engineering or equivalent.
• Minimum of three years' experience in analog custom IC physical design.
• Proficient in schematic-driven layout, floor planning, chip-level routing, design rule checks, and physical verification.

Responsibilities

• Design and layout custom analog and mixed-signal circuits from sub-blocks to top-level integration in collaboration with IC Design engineers
• Perform physical design verifications including LVS, DRC, and ERC to ensure design compliance
• Optimize layout implementation to improve power efficiency, performance, and area utilization through close collaboration with IC Design engineers
• Lead full-chip physical verification sign-off and manage tape-out processes to meet project deadlines
• Analyze and troubleshoot layout issues to maintain design integrity and functionality
• Work independently and proactively while contributing positively to team dynamics and project goals

Skills

Analog IC layout

Schematic-driven layout

Floor planning

Chip-level routing

Design rule checks

Physical verification

Education

Bachelor's degree in Electrical and Electronics Engineering

Job description

Company Overview

Advinno Technologies is an Independent Electronics Design House in Singapore, specializing in semiconductor design, engineering, manufacturing, and logistics. Their expertise spans AI deep learning, ASIC, FPGA, analog, mixed signal, RF, PCB, embedded systems, and turnkey solutions.

Job Summary

Senior IC Layout Engineers will design and layout custom analog and mixed-signal circuits, perform physical design verifications, and collaborate with IC Design engineers to optimize layouts for power, performance, and area, ensuring full-chip verification and tape-out.

Responsibilities

• Design and layout custom analog and mixed-signal circuits from sub-blocks to top-level integration in collaboration with IC Design engineers
• Perform physical design verifications including LVS, DRC, and ERC to ensure design compliance
• Optimize layout implementation to improve power efficiency, performance, and area utilization through close collaboration with IC Design engineers
• Lead full-chip physical verification sign-off and manage tape-out processes to meet project deadlines
• Analyze and troubleshoot layout issues to maintain design integrity and functionality
• Work independently and proactively while contributing positively to team dynamics and project goals

Preferred competencies and qualifications

• Bachelor's degree in Electrical and Electronics Engineering or equivalent
• Minimum of three years' experience in analog custom IC physical design
• Proficient in schematic-driven layout, floor planning, chip-level routing, design rule checks, and physical verification