R&D Engineer Adv Tech Dev (PKE) / Sr. Staff

Borr Drilling; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

Une entreprise de renommée mondiale recherche un concepteur de circuits intégrés pour gérer le développement de solutions d'emballage personnalisées pour des produits avancés. Le candidat idéal aura une formation en ingénierie et une expérience solide en intégrité de signal et de puissance, en plus d’excellentes compétences en gestion de projet. Ce poste propose des défis techniques dans un environnement dynamique et stimule l'innovation.

Qualifications

• Expérience: BS +8 ans, MS +6 ans, ou PhD +3 ans.
• Compréhension approfondie des concepts de signal et d'intégrité de puissance.
• Connaissance des matériaux liés à CPI et des processus de fabrication de substrats avancés.

Responsibilities

• Gérer les activités d'emballage IC depuis le concept jusqu'à la production.
• Collaborer avec divers groupes opérationnels pour résoudre les problèmes de qualité.
• Participer à des projets de développement de technologies d'emballage.

Skills

Signal Integrity

Power Integrity

Project Management

Communication

Leadership

Failure Analysis

Education

BS/MS/PhD in STEM, Material Science, Electrical, or Mechanical Engineering

Tools

Cadence APD

Job description

Job Description:

Work with business unit marketing and IC design teams to select the optimum package solution based on cost, performance, manufacturability, and reliability for new advanced silicon node products (5nm, 3nm, 2nm, and beyond).

• Collaborate with IC design, system design, package SI/PI, and thermal engineering teams to design custom packages.
• Ensure designed packages meet CPI, SI/PI, and thermal requirements (up to 1000sW+) for advanced node silicon products.
• Research, develop, and productize new materials such as TIM, build-up film, and underfill to support advanced node silicon (5nm & 3/2nm) POR definition.
• Manage IC packaging activities from concept through development, qualification, and high-volume production.
• Define assembly BOM, processes, troubleshoot, and support packaging issues related to new advanced technologies.
• Implement, optimize, and productize new technologies into high-volume manufacturing (HVM).
• Create package design documentation and assembly instructions.
• Work closely with QA and customers to resolve quality issues.
• Coordinate with packaging assembly and substrate suppliers for new product ramp-up, qualification, and production.
• Interface with other operational groups such as product engineering, foundry, test, and QA.
• Participate in package technology development and productivity projects, e.g., process enhancement, new material development.
• Engage with external customers for custom ASIC programs, development support, and issue resolution.
• Support NPI, package qualification, and sustainment activities, including capacity, cost, and manufacturing flexibility.

Job Requirements:

• Education: BS/MS/PHD in STEM, Material Science, Electrical, or Mechanical Engineering.
• Experience: BS +8 years, MS +6 years, or PhD +3 years.
• Deep understanding of signal and power integrity concepts, including impedance, s-parameters, and optimization.
• Proficiency with Cadence APD for custom substrate design.
• Hands-on experience with advanced assembly processes for flip-chip, MCM, and 2.5D packages for advanced nodes.
• Knowledge of CPI-related materials and wafer BEOL processes.
• Familiarity with advanced substrate manufacturing processes.
• Expertise in failure analysis techniques for advanced node products.
• Understanding of package cost structures.
• Strong project management, communication, and leadership skills.
• Ability to read and interpret mechanical drawings, knowledge of GD&T.
• Fundamentals of manufacturing and quality engineering (DOE, process capability).
• Ability to grow across multiple disciplines: manufacturing, materials, electrical, thermal, mechanical.
• Track record of innovation, publications, or patents is preferred.
• Familiarity with advanced technologies such as 2.5D, 3DIC, and glass substrates.