Process Integration Lead - Yield & Quality

STATS ChipPAC

Singapore

On-site

SGD 90,000 - 130,000

Full time

7 hours ago
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Job summary

STATS ChipPAC is seeking an experienced engineer to collaborate with AOI/process/equipment teams to swiftly contain defect density and inline excursions, identify root causes, and deliver effective solutions to satisfy customer quality.

The role requires 5–10 years in wafer bumping/fabrication/packaging with strong knowledge of process integration, stability, and yield enhancement. You will drive improvements through systematic analysis and participate in customer audits.

Qualifications

  • Must have degree in physics, chemistry, material science or related engineering.
  • 5–10 years of experience in wafer bumping, fabrication or packaging.
  • Strong knowledge in process integration, stability and yield enhancement.

Responsibilities

  • Work with AOI/process/equipment engineering to contain defect density and root causes and provide working solutions to satisfy customer quality.
  • Review unresolved requests for adjustment of complaints and read customer comments to determine basis of complaint and plan action to resolve.
  • Drive process improvement based on inline/electrical test/yield data to meet quality and yield targets.
  • Identify key process weaknesses and perform fine tuning on existing processes for continuous improvement to yield/quality/productivity and cost.
  • Use statistical knowledge (e.g. DOE, SPC) and systematic problem-solving techniques (e.g. 8D, 5 Whys) to determine root causes and develop containment/corrective/preventive actions.
  • Lead process control plan update and customer audit.

Skills

DOE
SPC
8D
5 Whys
Root cause analysis
Statistical analysis

Education

Engineering degree

Job description

STATS ChipPAC is seeking an experienced engineer to collaborate with AOI/process/equipment teams to swiftly contain defect density and inline excursions, identify root causes, and deliver effective solutions to satisfy customer quality.

The role requires 5–10 years in wafer bumping/fabrication/packaging with strong knowledge of process integration, stability, and yield enhancement. You will drive improvements through systematic analysis and participate in customer audits.

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