Principal Memory Circuit Design Engineer

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; Singapore; On-site; SGD 100,000 - 130,000; Full time

Job summary

A leading technology company in Singapore is seeking design engineers for their Central Engineering Group. The role involves analyzing memory architectures, design and simulation of circuit blocks, and automating verification processes. Candidates should have a BS in Electrical or Computer Engineering and 12 years of experience. Strong expertise in memory compilers and circuit design is essential for success in this dynamic environment.

Qualifications

• 12 years of related experience required.
• Strong skills in circuit design and simulation.
• Experience in automation scripts development.

Responsibilities

• Analyze different memory architectures.
• Design and build memory circuit blocks.
• Simulate and analyze circuit design.

Skills

Expertise in memory compilers

Understanding of transistor level circuit behavior

Understanding of memory bitcell R/W margins

Understanding of signal integrity analysis

Understanding of DFT schemes

Proficient in running simulators

Good communication skills

Education

BS in Electrical or Computer Engineering

Job description

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

• Analyze different memory architectures and highlight the tradeoffs
• Design and build memory or circuit blocks at the gate or transistor level
• Simulate and analyze the circuit design using transistor level simulators
• Extract the layout and perform post-layout simulations and verification
• Floorplan physical implementation and layout integration of design components
• Integrate characterization flow to extract timing and power information
• Develop scripts to automate characterization flow, simulations, and verification
• Specify and verify various behavioral and physical memory models
• Document the design specifications, behavioral description, and timing diagrams
• Help specify silicon test plan and correlate silicon to simulation data

Skillset Required

• Strong Expertise in development of memory compilers and custom macros of all types
• Deep understanding of transistor level circuit behavior and device physics
• Deep understanding of memory bitcell R/W margins and associated assist techniques
• Deep understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
• Good understanding of memory behavioral and physical models
• Good understanding of DFT schemes and chip level integration
• Proficient in running simulators, writing automation scripts, and are tools savvy
• Good communication, interpersonal, and leadership skills
• Motivated, self-driven and good at multi-tasking

Qualifications

Requires a BS in Electrical or Computer Engineering and 12 years of related experience