Junior FPGA Engineer: Low-Latency Hardware Design

Theblockchainassociation; Singapore; On-site; SGD 70,000 - 110,000; Full time

Benefits offered by this job

Mentorship from senior FPGA engineers

Hands-on learning on trading hardware

Career progression opportunities

Competitive compensation

Job summary

DRW is seeking a Junior or Graduate FPGA Engineer to join our FPGA team in Asia. This entry‑level role is for recent graduates or engineers with 1–2 years of hands-on experience eager to grow in a low-latency trading environment.

You will work with experienced engineers across software, trading and hardware teams to gain practical FPGA design experience. The role covers RTL development, tool-flow work, system bring-up and documentation, with mentorship and opportunities for rapid responsibility

Qualifications

• Bachelor’s/Master’s/PhD in Electrical/Computer Engineering, Computer Science or related field; recent graduates welcome.
• 0–2 years of professional experience or equivalent internships/projects are acceptable.
• Experience writing RTL in Verilog or SystemVerilog; familiarity with FPGA tool flows.

Responsibilities

• Contribute to RTL development, simulation and verification under senior guidance.
• Operate FPGA tool flows (synthesis, place & route, timing analysis) and interpret results.
• Assist with system- and block-level test plans and lab bring-up.
• Support debugging of boards and FPGA designs; help resolve production incidents.
• Collaborate with software, networking and trading teams to integrate FPGA components.
• Research new tools/techniques and propose incremental improvements.
• Produce clear documentation and test reports.

Skills

RTL development (Verilog/SystemVerilog

Linux scripting (Python/Bash)

Debugging & troubleshooting

Cross-functional teamwork

Documentation

Education

Bachelor’s/Master’s/PhD in EE/CE/CS

Tools

Xilinx tools

Intel/Altera tools

Job description

DRW is seeking a Junior or Graduate FPGA Engineer to join our FPGA team in Asia. This entry‑level role is for recent graduates or engineers with 1–2 years of hands-on experience eager to grow in a low-latency trading environment.

You will work with experienced engineers across software, trading and hardware teams to gain practical FPGA design experience. The role covers RTL development, tool-flow work, system bring-up and documentation, with mentorship and opportunities for rapid responsibility