FPGA Design & Validation Intern for SoC Platforms

AMD; Singapore; On-site; SGD 17,000 - 26,000; Full time

Job summary

AMD Singapore invites a motivated intern to join our FPGA design, validation, and automation team. You will work on AMD Xilinx SoC platforms such as Versal ACAP and Spartan UltraScale+ MPSoC, contributing to Vivado and Vitis projects, and learning bring-up and debugging of hardware platforms.

Ideal candidates are current students in Singapore-based universities with a hands-on mindset, strong RTL/C knowledge, and comfort with Python, Bash, or Perl scripting.

Qualifications

• Knowledge in digital logic design and solid foundation in RTL coding with VHDL or Verilog.
• Proficient in C programming, particularly for embedded firmware development.
• Comfortable with scripting languages such as Python, Bash, or Perl
• Background in Electronics and Electronics Engineering, Computer Engineering/ Science

Responsibilities

• Develop Vivado and Vitis projects tailored to AMD Xilinx hardware platforms.
• Validate hardware interfaces and test compiled project binaries on AMD SoC evaluation boards.
• Bring up hardware platforms, perform low-level debugging, and using embedded tools to configure systems.
• Creating detailed documentation and writing automation scripts to support a repeatable validation flow.

Skills

RTL design

VHDL/Verilog

C embedded

Python scripting

Bash scripting

Perl scripting

Education

Electronics Engineering

Computer Engineering

Computer Science

Tools

Vivado

Vitis

Job description

AMD Singapore invites a motivated intern to join our FPGA design, validation, and automation team. You will work on AMD Xilinx SoC platforms such as Versal ACAP and Spartan UltraScale+ MPSoC, contributing to Vivado and Vitis projects, and learning bring-up and debugging of hardware platforms.

Ideal candidates are current students in Singapore-based universities with a hands-on mindset, strong RTL/C knowledge, and comfort with Python, Bash, or Perl scripting.