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A technology company specializing in semiconductor solutions is looking for an engineer to design and verify high-speed low-power network chips. The role requires expertise in analog circuits, familiarity with CMOS IC design, and proficiency in EDA CAD tools. A Bachelor's or Master's degree in Electrical Engineering is required. Competitive compensation includes salary, performance bonuses, and stock options.
Company Overview
The team has more than 15 years of experience developing 1G/2.5G/5GBase-T Ethernet physical layer PHY and switch chips for data centers, enterprise networks, and gateways and has sucessfully developed multiple generations of the most competitive products.
The company is headquarted in Kunshan, and the R&D team is located in Kunshan, Suzhou, Shanghai, Beijing and Singapore.
The company is currently developing Ethernet PHY, gateway, and TSN switching chips. The target market is automotive & unpiloted driving, China's intelligent manufacturing, rail transit, and intelligent grid building industry provide domestic chips with "Independent intellectual property rights, independent and controllable.
We offer a competitive compensation package, including a salary commensurate with experience, Annual Wage Supplement (AWS), performance bonus, and stock options.
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