AI-Driven Digital Design Verification Intern

STMicroelectronics Asia Pacific Pte Ltd; Singapore; On-site; SGD 18,000 - 24,000; Full time

Job summary

STMicroelectronics Asia Pacific Pte Ltd invites a Design Verification Intern to join the Singapore digital team. You will help verify IP and SoC blocks, build AI-enabled verification flows, automate regression and reporting, and contribute to schedule adherence and progress updates.

This paid internship offers exposure to Cadence tools within a dynamic, global semiconductor environment. The role requires 8 to 12 months of full-time commitment, strong analytical skills, and a collaborative

Qualifications

• Experience or coursework in digital design verification concepts.
• Familiarity with verification lifecycle and closure criteria.
• Interest in AI-assisted verification workflows.

Responsibilities

• Support IP and SoC verification activities with improved flows.
• Automate verification flow, regression, and reporting tasks.
• Contribute to verification closure and progress reporting to management.

Skills

Digital design verification basics

Verification methodology

Automation

AI-enabled tools

Coverage and debugging

EDA tool awareness

Tools

Cadence tools

Job description

STMicroelectronics Asia Pacific Pte Ltd invites a Design Verification Intern to join the Singapore digital team. You will help verify IP and SoC blocks, build AI-enabled verification flows, automate regression and reporting, and contribute to schedule adherence and progress updates.

This paid internship offers exposure to Cadence tools within a dynamic, global semiconductor environment. The role requires 8 to 12 months of full-time commitment, strong analytical skills, and a collaborative