DSP/FPGA Engineer

TERASi; Stockholms kommun; On-site; SEK 900,000 - 1,300,000; Full time

Job summary

TERASi in Stockholm, Sweden, seeks an experienced DSP/FPGA engineer to own the digital modem for an E-band radio link. You will design and simulate the physical layer, including synchronization, estimation, and FEC, then implement in HDL on Xilinx Zynq-class SoCs and verify in the lab with SDR frontends.

Bring hands-on leadership to a small deep-tech team, collaborating with RF and embedded engineers to integrate the radio and network interfaces.

Qualifications

• 8+ years in DSP/FPGA development for wireless communication systems.
• Physical layer algorithm design: carrier and timing recovery, channel estimation, equalization, and FEC.
• HDL implementation on AMD/Xilinx SoCs with timing closure and verification environments.

Responsibilities

• Own the digital modem for our E-band radio link end to end.
• Design and simulate the physical layer: synchronization, channel estimation and equalization, FEC, adaptive coding and modulation.
• Implement it in HDL on AMD/Xilinx Zynq-class SoCs, build verification environment and bring up in lab against SDR frontends.
• Lead this effort at the technical level, collaborating with RF and embedded teams.

Skills

DSP/FPGA development

Modem/physical layer design

MATLAB/Python

HDL implementation (VHDL/SystemVerilog

SDR experience (GNU Radio/SoapySDR)

Independent leadership

Tools

VHDL

SystemVerilog

Xilinx Zynq-class SoCs

GNU Radio

SoapySDR

LimeSuite/IIO

Job description

DSP/FPGA engineer - as also known as Physical Layer / Modem Engineer in some organizations

About TERASi

We build Radio Units (RUs) — high-speed, secure, jam-resistant data pipelines for defence, telecom, and industrial markets. Think of them as the nervous system for things that can't afford to lose signal: UAVs that need to stay in contact, deployable 5G that has to work when the grid doesn't, tactical and industrial systems that need to keep talking no matter what's trying to interfere. We design and manufacture everything in Stockholm, from unique mmWave components and packaging up to complete radio systems.

Why Join Us Now

TERASi is at an inflection point: real defence, telecom, and industrial customers are waiting on systems we're actively building. We're a 20-person deep-tech company, which means no layers between your decisions and what ships. You'll define architectures, set conventions, and see your work running on hardware you can hold. If you want ownership of an entire technical domain rather than a slice of one, this is that stage of a company.

The Role

Own the digital modem for our E-band radio link, end to end. Design and simulate the physical layer: synchronization, channel estimation and equalization, forward error correction, adaptive coding and modulation. Implement it in HDL on AMD/Xilinx Zynq-class SoCs, build the verification environment, and bring it up hands-on in the lab against SDR frontends. You lead this effort at the technical level, working with the RF engineer on the radio interface and the embedded team on control and network integration.

Must-haves

What We're Looking For

• 8+ years in DSP/FPGA development for wireless communication systems, with at least one modem or physical layer taken from concept to working hardware
• Physical layer algorithm design: carrier and timing recovery, channel estimation, equalization, and FEC (convolutional and Reed-Solomon, or LDPC)
• Algorithm modeling and link-level simulation in MATLAB or Python
• HDL implementation (VHDL or SystemVerilog) on AMD/Xilinx SoCs, including timing closure and building proper verification environments
• Hands-on SDR experience: GNU Radio, SoapySDR, or vendor frameworks such as IIO or LimeSuite
• Self-directed: comfortable leading a development effort independently and making architecture decisions

Nice-to-haves

• Burst-mode or TDD modem experience
• Regulatory compliance work against transmit spectrum masks, such as ETSI EN 302 217
• Embedded Linux on Zynq PS: PetaLinux, DMA, driver integration
• Ethernet packet processing in programmable logic
• mmWave or point-to-point microwave link experience

What You Won't Need To Own

RF and microwave design, hardware and PCB development, and embedded software are covered by the rest of the team. You focus on the signal processing and FPGA domain, and define clean interfaces toward the radio and the network side.

TERASi is a deeptech startup based in Stockholm, Sweden which offers unique components and packaging for high-frequency wireless applications.

TERASi’s technology builds upon academic research at KTH Royal Institute of Technology and years of internal R&D. The company designs and manufactures all components from its Stockholm headquarters and now embarks upon a mission to scale their technology and bring it to mass markets.