Baseband SoC Expert

Huawei Sweden; Kista; On-site; SEK 900,000 - 1,200,000; Full time

Job summary

Huawei Sweden is seeking a senior SoC architect to design the architecture for next‑generation wireless baseband computing power. You will evaluate, integrate IPs, and tackle bottlenecks through rigorous simulation and research.

You will collaborate with algorithm teams, hardware and software engineers, and coordinate with the core team in Shanghai to address critical wireless technology challenges.

Qualifications

• 5+ years of industrial or academic experience in SoC areas such as processors, interconnects, interfaces, scheduling, cache/DMA, memory systems, and design methodology.
• Knowledge of software and hardware architecture design for large-scale parallel computing.
• Hands-on skills in block design with Verilog or VHDL.
• PhD in electrical engineering, computer architecture, or equivalent background required.

Responsibilities

• Design the SoC architecture for next‑gen computing power in wireless baseband chips.
• Design, evaluate, and integrate IP to maintain architectural leadership; address bottlenecks via simulation and research.
• Collaborate with algorithm experts, hardware engineers, and software specialists; coordinate with the Shanghai core team.

Skills

DSP architecture

ARM micro-architecture

CPU micro-architecture

Vector/Matrix/Graph processors

SRAM/DRAM/Cache design

AI‑based computing architecture

SoC design

Multi-threaded software

Verilog/VHDL

Education

PhD in electrical engineering or computer architecture

Job description

Responsibilities

• Design the SoC architecture for the 5.5/6G wireless baseband chip, focusing on the next‑generation computing architecture to meet increasing demand for computing power.
• Design, evaluate, and integrate cutting‑edge IP to ensure architectural leadership; address challenging architectural bottlenecks through simulation and research.
• Collaborate with algorithm experts, hardware engineers, and software specialists; maintain close coordination with the core team in Shanghai and participate in tackling critical wireless technology challenges.

Qualifications and Experience

The ideal candidate will have over five years of industrial or academic experience in SoC areas such as processors, interconnects, interfaces, scheduling, cache/DMA, memory systems, power consumption, and design methodology. They should possess knowledge of software and hardware architecture design for large‑scale parallel computing, and have hands‑on skills in block design with Verilog or VHDL.

• Knowledge in wireless physical layer applications is preferred.
• Experience in designing DSP, ARM, or CPU micro‑architecture.
• Experience in designing vector, matrix, or graph processors.
• Experience in designing SRAM, DRAM, or cache systems.
• Experience in designing AI‑based computing architecture.
• Experience in designing SoC systems.
• Experience in developing multi‑threaded software.
• A Ph.D. in electrical engineering, computer architecture, or an equivalent background is required.

Other

• Highly developed skills in finding innovative solutions, strategic vision, and the ability to lead and drive activities.
• Prior experience with international and multicultural work environments is preferred.
• Fluency in English, both verbal and written.