Analog Design Engineer - Low-Power Memory IP Specialist

Nexer Group; Lunds kommun; On-site; SEK 700,000 - 900,000; Full time

Job summary

Xenergic is a Lund-based semiconductor company developing high-speed, low-power on-chip memory IP. As an Analog Design Engineer, you will join a specialized team to design and optimise analog circuits behind memory technology, collaborating across analog, digital, layout and verification to deliver robust memory IP.

You will contribute to circuit design, simulations, and layout considerations, with a focus on power, performance, and area, while working in a small, knowledge-sharing team in Lund.

Qualifications

• M.Sc. in Electronics Engineering or related field.
• Three years of professional experience in analog IC design, including transistor-level design and simulation.
• Fluency in English and strong understanding of CMOS circuit design.
• Experience with layout, parasitic effects, and EMIR-aware design is a plus.

Responsibilities

• Design and optimise analog circuits and custom IC blocks for SRAM and memory IP.
• Perform transistor-level design, schematic development and circuit simulation.
• Analyse circuit behaviour to optimise power, performance and area.
• Contribute to physical layout and verification, including parasitics and EMIR.
• Support memory IP adaptation across different process technologies.
• Collaborate with analog, digital, layout and verification teams.

Skills

Analog IC design

Transistor-level design

Cadence Virtuoso

Spectre

CMOS circuit design

Layout awareness

Python scripting

Shell scripting

SKILL

EMIR-aware design

Education

M.Sc. in Electronics Engineering or related field

Tools

Cadence Virtuoso

Spectre

Python

Shell

SKILL

Job description

Xenergic is a Lund-based semiconductor company developing high-speed, low-power on-chip memory IP. As an Analog Design Engineer, you will join a specialized team to design and optimise analog circuits behind memory technology, collaborating across analog, digital, layout and verification to deliver robust memory IP.

You will contribute to circuit design, simulations, and layout considerations, with a focus on power, performance, and area, while working in a small, knowledge-sharing team in Lund.