Analog Design Engineer – High-Speed Memory IP

Xenergic AB; Lunds kommun; On-site; SEK 700,000 - 900,000; Full time

Job summary

Xenergic AB in Lund, Sweden, is seeking an Analog Design Engineer to join a small, specialized team developing high-speed, low-power memory IP for advanced chip technologies. You will design and optimize analog circuits and IC blocks for SRAM and memory IP, with a focus on power, performance, and silicon area.

The role involves transistor-level design, circuit simulation, layout verification, and collaboration with analog, digital, layout and verification teams to ensure robust integration into

Qualifications

• At least three years of professional experience in analog IC design, including transistor-level design, schematic development and simulation.
• Good understanding of CMOS circuit design and ability to analyze simulation results to optimize power, performance and area.
• Experience with Cadence Virtuoso and Spectre or comparable EDA tools, and awareness of layout parasitics.

Responsibilities

• Design and optimise analog circuits and custom IC blocks for SRAM and memory IP.
• Work with transistor-level and schematic design, including circuit simulation and verification across operating conditions.
• Analyse circuit behaviour and optimise designs for power consumption, performance and area.
• Contribute to physical layout, design verification and analysis of layout-related effects, including parasitics and EMIR.
• Support memory IP development across different semiconductor process technologies.
• Collaborate with analog, digital, layout and verification teams to integrate into customer designs.

Skills

Analog IC design

Transistor-level design

Circuit simulation

Power optimization

CMOS circuit design

Python scripting

Education

M.Sc. in Electronics Engineering

Microelectronics

Tools

Cadence Virtuoso

Spectre

Job description

Xenergic AB in Lund, Sweden, is seeking an Analog Design Engineer to join a small, specialized team developing high-speed, low-power memory IP for advanced chip technologies. You will design and optimize analog circuits and IC blocks for SRAM and memory IP, with a focus on power, performance, and silicon area.

The role involves transistor-level design, circuit simulation, layout verification, and collaboration with analog, digital, layout and verification teams to ensure robust integration into