Hardware Verification Engineer - SoC & Chiplet Innovation

Arteris

Kraków

On-site

PLN 120,000 - 180,000

Full time

12 days ago
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Job summary

Arteris is seeking a Hardware Verification Engineer in Krakow to design, implement and run robust verification strategies for SoC and IP interconnect solutions. You will work with cross-functional teams to ensure correctness, performance and reliability of complex hardware IP.

You will define test plans, develop verification components like BFMs, and advance automation for scalable verification across multi-sourced RTL environments. Fluency in English and 2+ years in the field are required.

Qualifications

  • At least 2 years of industry experience as a verification engineer.
  • Strong experience in hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, SystemVerilog).
  • Experience in formal proof verification methodology is a plus
  • Shell scripting experience
  • Understanding of hardware communication protocols (AMBA, OCP, others)

Responsibilities

  • Define, document, develop and execute RTL verification test/coverage for extremely parameterized IPs in Python and C++, capable of running on any available RTL simulator (Cadence, Synopsys, etc.).
  • Maintain and improve verification workflows.
  • Improve metrics and increase automation.
  • Implement verification components such as BFMs or monitors used in verification test benches.

Skills

RTL verification
VHDL
Verilog
SystemC
C++
Python
SystemVerilog
UVM
Shell scripting

Education

Master’s degree
Doctorate (PhD)

Tools

VIPs
UVM

Job description

Arteris is seeking a Hardware Verification Engineer in Krakow to design, implement and run robust verification strategies for SoC and IP interconnect solutions. You will work with cross-functional teams to ensure correctness, performance and reliability of complex hardware IP.

You will define test plans, develop verification components like BFMs, and advance automation for scalable verification across multi-sourced RTL environments. Fluency in English and 2+ years in the field are required.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Hardware Verification Engineer
Hardware Verification Engineer

Arteris • Kraków

On-site
PLN 120,000 - 180,000
Staff Hardware Design Engineer — NoC & SoC Architect
Staff Hardware Design Engineer — NoC & SoC Architect

Arteris • Kraków

On-site
PLN 180,000 - 300,000
Staff Hardware Design Engineer (F/M)
Staff Hardware Design Engineer (F/M)

Arteris • Kraków

On-site
PLN 180,000 - 300,000
Staff Corporate Applications Engineer - HW Security
Staff Corporate Applications Engineer - HW Security

Arteris • Kraków

On-site
PLN 210,000 - 310,000
Senior Corporate Security Applications Engineer
Senior Corporate Security Applications Engineer

Arteris • Kraków

On-site
PLN 180,000 - 290,000
Senior Hardware Security Applications Engineer
Senior Hardware Security Applications Engineer

Arteris • Kraków

On-site
PLN 210,000 - 310,000
Senior HW Security Verification Engineer - Customer Success
Senior HW Security Verification Engineer - Customer Success

Arteris • Kraków

On-site
PLN 180,000 - 290,000
Senior FPGA Design Engineer – High-Speed Networking
Senior FPGA Design Engineer – High-Speed Networking

Arista Networks • Kraków

On-site
PLN 100,000 - 130,000
FPGA Design Engineer - Poland
FPGA Design Engineer - Poland

Arista Networks • Kraków

On-site
PLN 100,000 - 130,000
Hardware Engineer - Electrical & Electronics Systems
Hardware Engineer - Electrical & Electronics Systems

Algoteque • Kraków

On-site
PLN 120,000 - 180,000