FPGA Engineer

Sky Spy Inc

Warszawa

Hybrid

PLN 180,000 - 260,000

Full time

3 days ago
Be an early applicant

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

Sky Spy Inc in Warsaw is seeking an experienced FPGA Engineer to develop high-performance FPGA/SoC solutions for DSP and RF applications. You will design RTL in VHDL/Verilog, optimize DSP blocks, and integrate with Xilinx SoC hardware.

You will work with Vivado, high-speed data paths, and cross-disciplinary teams to achieve timing closure and resource efficiency in RF/SDR platforms.

Qualifications

  • 5+ years of commercial FPGA development experience.
  • Strong knowledge of VHDL and/or Verilog; both is a plus.
  • Hands-on with Xilinx FPGA/SoC platforms including 7-Series, UltraScale/UltraScale+, Zynq SoC.
  • Solid digital design and RTL development skills.
  • Practical DSP implementations on FPGAs.
  • Understanding RF signal processing and SDR architectures.
  • Experience with Xilinx Vivado and IP cores.
  • Good timing analysis and CDC/FPGA constraint knowledge.
  • Experience debugging FPGA designs on real hardware.

Responsibilities

  • Design and develop FPGA/SoC solutions based on Xilinx devices.
  • Develop RTL designs using VHDL and Verilog.
  • Implement and optimize DSP algorithms (FIR/IIR, FFT, DDC/DUC).
  • Develop DSP chains for RF/ SDR systems and high-speed data paths.
  • Integrate FPGA logic with Xilinx SoC and embedded subsystems.
  • Perform RTL simulation, verification, and hardware debugging.
  • Optimize timing, resources and performance; address CDC issues.
  • Work with Xilinx Vivado, constraints, and IP cores; resolve issues.

Skills

FPGA development
VHDL
Verilog
Xilinx FPGA/SoC
DSP on FPGAs
RF/SDR architectures
Xilinx Vivado
Timing analysis
Clock-domain crossing
HDL debugging

Tools

Vivado
Xilinx IP cores
Simulation tools

Job description

We are looking for an FPGA Engineer to join our team and work on high-performance FPGA/SoC solutions, with a strong focus on digital signal processing (DSP), algorithms, and RF applications.

Location

This is a full-time, hybrid role based in Warsaw, Poland.

Responsibilities
  • Design and develop FPGA/SoC solutions based on Xilinx 7-Series and UltraScale/UltraScale+ devices.
  • Develop RTL designs using VHDL and Verilog.
  • Implement and optimize DSP algorithms, including FIR/IIR filters, FFT, DDC/DUC, decimation/interpolation, mixers, NCOs, and other signal-processing blocks.
  • Develop digital signal-processing chains for RF / SDR systems.
  • Work with high-speed data paths and streaming architectures.
  • Integrate FPGA logic with Xilinx SoC and embedded processor subsystems.
  • Perform RTL simulation, verification, and hardware debugging.
  • Optimize FPGA designs for timing closure, resource utilization, and performance.
  • Work with Xilinx Vivado, synthesis, implementation, constraints, and Xilinx IP cores.
  • Analyze and resolve timing, clock-domain, and hardware-related issues.
  • Collaborate with hardware, embedded software, DSP, and RF engineers.
Requirements
  • 5+ years of commercial experience in FPGA development.
  • Strong knowledge of VHDL and/or Verilog; experience with both is a plus.
  • Hands-on experience with Xilinx FPGA/SoC platforms, including:
    • 7-Series;
    • UltraScale / UltraScale+;
    • Zynq SoC.
  • Solid understanding of digital design and RTL development.
  • Practical experience implementing DSP algorithms on FPGAs.
  • Understanding of RF signal processing and SDR architectures.
  • Experience with Xilinx Vivado and Xilinx IP.
  • Good understanding of timing analysis, clock-domain crossing (CDC), reset strategies, and FPGA constraints.
  • Experience debugging FPGA designs on real hardware.
Nice to Have
  • Experience with Zynq-7000 / Zynq UltraScale+ MPSoC.
  • Knowledge of AXI4 / AXI-Stream.
  • Experience with high-speed interfaces such as JESD204, Ethernet, PCIe, DDR, etc.
  • Experience implementing FFT, DDC/DUC, channelizers, beamforming, and other DSP blocks.
  • Experience with ADC/DAC interfaces and RF transceivers.
  • Knowledge of SystemVerilog, Tcl, Python, or C/C++.
  • Experience with hardware/software co-design.
  • Strong understanding of fixed-point arithmetic and FPGA-oriented DSP optimization.
About Sky Spy

Sky Spy is a fast-growing dual-use startup developing next-generation RF intelligence solutions for contested environments. We are backed by leading European VCs, combat veterans, and technologists. Our mission is to deliver intelligence that saves lives and empowers allied forces worldwide.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

FPGA Developer - Poland
FPGA Developer - Poland

GTS • Warszawa

On-site
PLN 253,807 - 359,560
FPGA Design Engineer - Poland
FPGA Design Engineer - Poland

Arista Networks • Kraków

On-site
PLN 100,000 - 130,000
FPGA Engineer
FPGA Engineer

Infotree Global Solutions Inc. • Polska

On-site
PLN 110,000 - 170,000
Senior FPGA Firmware Engineer
Senior FPGA Firmware Engineer

Woodward, Inc. • Województwo małopolskie

Hybrid
PLN 18,000 - 28,000
Private health insurance
Life & accidental insurance
Multisport package
+4
Senior FPGA Engineer (Defence & Security)
Senior FPGA Engineer (Defence & Security)

Spyrosoft Ltd • Wrocław

On-site
PLN 120,000 - 180,000
Senior FPGA Engineer - Defence & Security (On-site Wroclaw)
Senior FPGA Engineer - Defence & Security (On-site Wroclaw)

Spyrosoft Ltd • Wrocław

On-site
PLN 120,000 - 180,000
Digital Design / FPGA Engineer
Digital Design / FPGA Engineer

Antmicro • Poznań

On-site
PLN 171,159 - 256,739
FPGA Digital Design Engineer — SoC & Software Integration
FPGA Digital Design Engineer — SoC & Software Integration

Antmicro • Poznań

On-site
PLN 171,159 - 256,739
Senior FPGA Systems Engineer
Senior FPGA Systems Engineer

GTS • Warszawa

On-site
PLN 253,807 - 359,560
Digital Design / FPGA Engineer
Digital Design / FPGA Engineer

Antmicro • Katowice

On-site
PLN 191,164 - 276,125