Verification Engineer - RISC-V, SV/UVM, IP Design

10xengineers; Lahore; On-site; PKR 446,400 - 669,600; Full time

Job summary

A semiconductor design company is seeking a self-motivated engineer to join their verification team in Lahore. In this role, you will be responsible for developing and executing test plans for complex IP designs, collaborating closely with designers. Ideal candidates should have expertise in RISC V assembly and C programming, along with a good understanding of computer architecture concepts. This full-time position offers a great opportunity to work within a dynamic and collaborative environment.

Qualifications

• 2+ years of working experience required.
• Expertise in SystemVerilog and UVM desired.
• Familiarity with hypervisors and virtualization is a plus.

Responsibilities

• Develop and execute test plans for complex IPs.
• Collaborate with design and verification teams.
• Maintain thorough documentation of verification activities.

Skills

RISC V assembly language expertise

C language expertise

Understanding computer architecture concepts

Problem-solving skills

Communication abilities

Education

Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field

Tools

Verilog/System Verilog

Verification tools

Job description

A semiconductor design company is seeking a self-motivated engineer to join their verification team in Lahore. In this role, you will be responsible for developing and executing test plans for complex IP designs, collaborating closely with designers. Ideal candidates should have expertise in RISC V assembly and C programming, along with a good understanding of computer architecture concepts. This full-time position offers a great opportunity to work within a dynamic and collaborative environment.