Product Engineer

Lattice Semiconductor Corp.; Manila; On-site; PHP 700,000 - 1,000,000; Full time

Job summary

Lattice Semiconductor Corp. is seeking a Product Engineer in Manila to drive ATE test programs and characterize chip IP features across process conditions. You will develop bench automation, design test circuits, and collaborate with multiple teams to resolve product issues and deliver tested samples on time.

The role requires hands-on hardware and RTL experience, strong data analysis skills, and excellent English communication to coordinate with global teams.

Qualifications

• BS degree in ECE/CoE/EE/Physics or equivalent.
• Experience in ATE test program development and debug.
• Background in semiconductor test methodologies and device knowledge.

Responsibilities

• Develop ATE test and characterization programs for chip IP features.
• Create characterization plans and run wafer- and package-level tests.
• Analyze data to define datasheet parameters and report results.
• Identify root causes of marginalities and drive corrective actions.
• Design and implement test circuits using FPGA fabric and embedded IP.

Skills

Product Engineering

Semiconductor Test

ATE Test Programs

Nextest Magnum

Advantest T2K

Bench Hardware

RTL Design

Python/C++

Statistical Analysis

English Communication

Education

Bachelor's degree in ECE/CoE/EE/Physics

Tools

Oscilloscope

Pattern Generators

Data Timing Generator

Multimeters

Job description

# Join the FPGA Leader## Product EngineerApply: Manila, Philippines: Full time: Posted Today: End Date: December 31, 2026 (30+ days left to apply): R-103347# **Lattice Overview**There is energy here...energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.**Job Description:**# Responsibilities* Develop ATE test and characterization programs.* Develop characterization test plans using established methodologies targeted on chip IP functions and features.* Execute characterization of target chip IP features using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions.* Apply statistical analysis on collected characterization data to define key product datasheet parameters and report out results.* Identify and analyze to root cause product marginalities, communicating and coordinating root cause closure to appropriate cross-functional team (eg. Applications Engineering, Design Engineering, etc.)* Design and implement test circuits using FPGA fabric and embedded IP.* Develop bench automation and data collection scripts and programs.* Design and develop ATE and bench HW.* Drive all product issues to resolution.* Plan and execute testing of samples (ie. AS, ES), ensuring timely delivery of tested samples to internal and external customers.* Analyze and report out on test yield and test time.# # Required Skills* At least 2 years individual contributor in Product Engineering or Si Validation / Characterization* BS degree (ECE, CoE, EE, Physics)* Good working knowledge of semiconductor devices and test methodologies* Experience in ATE test program development, integration and debug on Nextest Magnum and Advantest T2K* Experience in hardware development (bench board)* Experience in IC validation and characterization using various bench tools (i.e. Oscilloscope, Pattern Generators, Data Timing Generator, Multimeters, etc)* Experience with WAT/etest, wafer sort, package assembly, final test (i.e. full backend IC process)* Experience in Programmable Logic is desired* Experience in RTL Design, Design Verification an advantage* Knowledge in test, DFT methodologies (ie. scan, BIST), and fault grade methodologies an advantage* Knowledge in Hardware Description Language such as Verilog or VHDL an advantage* Knowledge in programming languages (ie. Python, C++)* Knowledge of Statistical Process Control* Proficient in the use statistical analysis SW (ie. SAS JMP, R)* Knowledge in Yield Analysis* Excellent verbal and written English skills. Demonstrated ability to work with multiple groups and across cultures* Good analytical and problem solving abilities* Strong Windows, Unix, and MS Office skills* Curious with strong self-motivation to learn and explore**Additional Information:**This position requires a successful background and reference checks and satisfactory proof of your right to work in:PhilippinesLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.