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Cadence Design Systems, Inc. is seeking a skilled researcher for Numerical Modeling & Architecture to guide transceiver component selection using mathematical modelling techniques.
You will collaborate with analog and digital designers, applications engineers, and marketing to optimize end-to-end performance. The role involves lab characterization and analysis of final designs, with a focus on high-speed wireline transceivers in CMOS silicon.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This is an opportunity to join a dynamic and growing team of engineers developing extremely high-speed wireline communications transceivers in CMOS silicon.
This job opening is for Numerical Modeling & Architecture, helping guide the selection and specification of transceiver components using mathematical and computer modelling techniques.
The candidate will collaborate with analog designers, digital designers, applications engineers, and marketing specialists to help guide tradeoffs among conflicting design goals, and as such will be responsible for the performance of the end-to-end system.
This will also require involvement in lab characterization and analysis of finally realized designs. The position is full-time in our San Jose office.
The ideal candidate will have several of the following:
The ideal candidate will likely have a PhD in the mathematical or physical sciences.
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