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Lokotech Group in Norway is seeking a CTO to lead the company through first-silicon bring-up in H2 2026 and to own the technology roadmap for a second-generation ASIC and edge AI ventures.
This player-coach role combines executive responsibility for foundry and roadmap decisions with hands-on engineering, including silicon debug, and representation to the board and partners in Arctic AI negotiations.
Lokotech Group is a Norwegian semiconductor and hardware company, listed on Euronext Growth Oslo, building dual-purpose ASIC technology: a 12nm Scrypt mining ASIC with an AI inference path that forms the basis of our long-term edge AI strategy. The group spans chip development, hardware products (including the SPDU power distribution line), mining pool software through Powerpool in Madrid, and hosting and datacenter infrastructure in Northern Norway, where our Kautokeino site serves as the test and verification environment for hardware, cooling, and heat recovery.
We are a small, agile, relatively capital-light and milestone-driven organization. The group currently has five employees, but we are growing in both engineering, sales and supporting roles. Development is self-financed, and the AI capability is treated as long-term optionality to be sequenced carefully against a finite balance sheet.
About the role
We are hiring a CTO to lead the company through first-silicon bring-up in H2 2026 and to own the technology roadmap from there: a second-generation ASIC on a more advanced node, an edge AI joint venture, and a portfolio of supporting hardware and software products.
This is a player-coach position. You will combine executive responsibility for foundry and roadmap decisions with direct, hands-on engineering work, including silicon debug. You will also represent the company technically to the board, to public markets, and to the partners in our Arctic AI joint venture negotiations.
What you will do
Your first priority is bringing our first silicon to life. You will own the path from tape-out through bring-up, characterization, and validation, manage re-spin risk together with our foundry and assembly partners, and drive the design toward commercial maturity on an aggressive timeline.
From there, you will lead the next generation of our ASIC roadmap: a migration to a more advanced process node and a denser, more efficient second-generation chip. You will own the architecture across both the compute and AI inference paths, since the dual-purpose nature of the chip is the strategic thesis of the company.
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