Senior Principal IC Design Engineer - Logic & Power

Nexperia Germany; Nijmegen; On-site; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Attractive Bonus

Training & career development

Retirement provisions

Travel allowance

Employee discounts

Job summary

Nexperia Nijmegen seeks an experienced IC design engineer to lead the development of logic and switch families in high-volume, cost-focused products. You will own the technical requirements and guide cross-functional teams through concept, design, validation and qualification stages.

Responsibilities include driving full chip design, top-level layout fit for packaging, evaluating technology variants from 350nm to 110nm, and defining ESD strategies for automotive-grade operation from -40C to 125C.

Qualifications

• Master's degree in electrical engineering.
• 10+ years of experience in semiconductor industry and circuit design.
• Knowledge of CMOS and BCD technologies.
• Experience with ESD mechanisms and protection techniques.
• Advanced knowledge of analog EDA tools and simulations.
• Hands-on experience with characterization and lab equipment.
• Excellent English communication skills.

Responsibilities

• Develop and release products combining ICs and plastic packages for high-volume production.
• Lead cross-functional teams across design, product, test and quality engineering.
• Drive full chip design and top-level layout for required packages.
• Assess technology options and make proposals for long-term roadmaps.
• Develop circuit techniques and ESD strategies with front/back-end teams.
• Work on technology assessment from 350nm to 110nm CMOS/BCD processes.
• Design ICs for automotive temperature range (-40C to 125C).

Skills

English communication

Education

Master's degree in electrical engineering

Tools

Cadence

Synopsys

Job description

Nexperia Nijmegen seeks an experienced IC design engineer to lead the development of logic and switch families in high-volume, cost-focused products. You will own the technical requirements and guide cross-functional teams through concept, design, validation and qualification stages.

Responsibilities include driving full chip design, top-level layout fit for packaging, evaluating technology variants from 350nm to 110nm, and defining ESD strategies for automotive-grade operation from -40C to 125C.