FPGA Engineer

Headlands Technologies LLC

Amsterdam

In loco

EUR 70.000 - 110.000

Tempo pieno

14 giorni+

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Descrizione del lavoro

Headlands Tech in Amsterdam develops and scales FPGA-based trading hardware. The FPGA Engineer will design and verify RTL for trading systems, build reusable IP, and integrate hardware with software and research teams.

The role emphasizes scalable design, fast-paced delivery, and collaboration across hardware and software groups in a global infrastructure.

Competenze

  • Professional experience with FPGA/ASIC design and verification.
  • Experience developing reusable IPs and scaling designs to multiple target platforms.
  • Solid understanding of digital design principles.
  • Strong working knowledge of either SystemVerilog/Verilog/VHDL.
  • In-depth knowledge of common EDA tools.
  • Knowledge of C++ required.
  • Familiarity with TCL/Python/Bash scripting.
  • University degree in EE, CS, CE or related technical field.
  • Experience with high-speed transceivers, networking protocols, and packet processing is preferred.

Mansioni

  • Design and verify RTL implementations for trading systems.
  • Develop reusable IP components that can be deployed across multiple platforms.
  • Integrate hardware designs with wider technology stack.
  • Script automation tasks and workflow improvements.
  • Collaborate with software, research, and systems teams.

Conoscenze

FPGA/ASIC design
IP development
Digital design
SystemVerilog/Verilog/VHDL
EDA tools
C++
Scripting languages TCL/Python/Bash

Formazione

University degree in EE/CS/CE or related field

Descrizione del lavoro

FPGA Engineer Job Description For Headlands Tech

Locations: Amsterdam; Chicago; London; New York

Scope

As an FPGA Engineer at Headlands Tech, you will be responsible for digital circuit design and verification, developing in-house intellectual property, and scaling designs globally. You will work with cutting-edge hardware technologies to support the Firm's automated trading infrastructure.

Qualifications
  • Professional experience with FPGA/ASIC design and verification
  • Experience developing reusable IPs and scaling designs to multiple target platforms
  • Solid understanding of digital design principles
  • Strong working knowledge of either SystemVerilog/Verilog/VHDL
  • In-depth knowledge of common EDA tools
  • Knowledge of C++ required
  • Familiarity with common scripting languages TCL/Python/Bash
  • University degree in EE, CS, CE or related technical field
  • Experience with high-speed transceivers, networking protocols, and packet processing is preferred
Day To Day
  • Design and verify RTL implementations for trading systems
  • Develop reusable IP components that can be deployed across multiple platforms
  • Integrate hardware designs with wider technology stack
  • Script automation tasks and workflow improvements
  • Collaborate with software, research, and systems teams

We are proud to be an equal opportunity workplace and to provide employees with a work environment free of discrimination and harassment. All employment decisions at Headlands Tech are based on business needs, job requirements and individual qualifications, without regard to race, color, religion or belief, national origin, sex, sexual orientation, gender identity/expression, age, status as a protected veteran, status as an individual with a disability, or any other applicable legally protected characteristics. Headlands Tech will not tolerate discrimination or harassment based on any of these characteristics.

By completing this application you agree to our GDPR and Privacy Policies.

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